Magnetic DRAM Arrives

Nov. 12, 2012
Everspin is moving into the DRAM market but it is just using the DRAM footprint and interface to put MRAM technology into DDR3 DIMM sockets.

Everspin original MRAM employed spin-torque write technology (see Magnetic Cores To MRAM: Nonvolatile Tipping Point?) It stored each bit using a magnetic approach that is not much different than hard disk storage or old core memory. How Everspin did this is much different than those technologies but the result is the same: fast, non-volatile storage. Initially Everspin memory chips were used in niche markets because their capacity was lower than DRAM even though MRAM has benefits that are applicable to main memory.

The big news is that Everspin's latest chip has a high enough density to be useful as a microprocessor's main memory. This is currently dominated by DDR3 DRAM so Everspin's chip is designed to work within a DDR3 DRAM DIMM environment (Fig. 1).

Figure 1. This is no ordinary DRAM DIMM. Those are MRAM chips.

Everspin's spin-torque write technology (Fig. 2) replaces the earlier toggle write technology. The new technology is faster but it also has a high density. The latest chips store 64 Mbits and run at 3.2 Gbytes/s. This capacity is still lower than DDR3 DRAM but the benefits of non-volatility is key.

Figure 2. The DRAM MRAM chips employ Everspin's spin-torque write technology that replaces the earlier toggle write approach.

Non-volatile DDR3 DIMMs are not a new idea but the MRAM implementation is. Viking Technology’s ArxCis-NV (see The Fundamentals Of Flash Memory Storage) actually packs DDR3 DRAM and flash memory on the same DIMM. The big difference compared to Everspin's approach is that ArxCis-NV requires external power to keep a supercap charged. The supercap is used to power the system when power is lost so it can copy the contents of DRAM to flash. The contents of the flash memory are restored when power returns.

Likewise, using non-volatile storage as the main memory for microcontrollers is not new. Texas Instruments’ 16-bit MSP430FR57xx has a single FRAM memory block for code and data (see Microcontroller Utilizes FRAM For Code And Data).

At this point, Everspin is actually comparing its MRAM DIMM with flash storage because in the enterprise space it is one of the hot topics. While Everspin's MRAM has a smaller capacity compared to flash, MRAM is faster and more power efficient per operation than flash. The key to parsing this is statement is "per operation." MRAM is faster than flash especially when it comes to writes. 64 Gbit flash memory delivers about 800 IOPS at 80 mW. 1 Gbit MRAM delivers 400K IOPS at 400mW. MRAM is also 50 times more expensive at this point. Still, MRAM is cost effective overall.

Everspin's MRAM DRAM chips have the same pin out as standard JEDEC DRAM chips (Fig. 3). The chips are available in 16Mbit by 4, 8Mbit by 8, and 4Mbit by 16 configurations.

Figure 3. Everspin's MRAM DRAM chips have the same pin out as standard DRAM chips.

DRAM requires refreshing but MRAM does not. The choice of DRAM form factors was chosen because it is so popular. It means that standard motherboards can take advantage of MRAM in the same fashion as with Viking's ArxCis-NV DIMMs.

Everspin has been working with FPGA vendors to implement DRAM interfaces that can take advantage of the new MRAM. These are standard FPGA eval boards that allow designers to experiment with the DIMMs.

Products like Viking's ArxCis-NV is actually blazing the trail for MRAM because operating systems and applications need to be modified to take advantage of this approach. In many ways, it is going back in time because computers based on magnetic storage like core memory used this approach already. In fact, boot programs used to checksum memory when they started to see if the operating system was already loaded and intact. Servers could restart almost immediately.

MRAM is not at the point of wholesale DRAM replacement and it will not replace ArxCis-NV at this point. Price, capacity and other factors affect user choices.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.  

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