TI's DSP Roadmap Promises 3 Trillion Instructions Per Second By 2010

Jan. 10, 2000
At last month's IEDM conference, Texas Instruments' senior fellow and new business development manager Gene Frantz unveiled a DSP technology roadmap that promises 3 trillion instructions per second (TIPS) by 2010. This would be 230 times more...

At last month's IEDM conference, Texas Instruments' senior fellow and new business development manager Gene Frantz unveiled a DSP technology roadmap that promises 3 trillion instructions per second (TIPS) by 2010. This would be 230 times more powerful than today's DSP processors, which tout several billion instructions per second (BIPS).

"TI is combining advanced DSP architectures with leading system-level integration and process technologies, including copper interconnect and silicon-on-insulator (SOI), to propel the performance of its TMS320 DSPs beyond 1 TIPS and even 3 TIPS by 2010," Frantz noted. He also said that semiconductor suppliers must provide higher performance, increased power efficiency and functionality, and a greatly simplified software development process to meet the increased OEM demands for highly integrated system-on-a-chip (SoC) solutions.

TI will begin conversion to a 0.1-µm (drawn) CMOS process this year, with plans to migrate to 0.075-µm (drawn) geometries by 2005. This will allow the integration of over eight TMS320 DSP cores, each with over 100 million transistors, on a single CMOS chip in the next five years. While the new DSP roadmap calls for only a 15-fold improvement in the core DSP processing performance by 2005, it envisions a quantum leap in the technology by 2010. As per the roadmap, TI's process technology consequently will let dozens of DSP cores, with 500 million transistors each, be integrated on the same chip by the end of this decade.

TI asserts that its newest DMOS-6 fabrication facility and other internal fabrication capabilities are key drivers for DSP performance and growth. The company expects DMOS-6 to begin 300-mm wafer production by the second half of 2001.

Programming and generating hundreds of millions of lines of code for these powerful DSP processors will be challenging. To address these issues, TI is ensuring that reusable software components, combined with intelligent profiling compilers, will maximize hardware efficiency and make DSPs much easier to program.

For more information, visit the company's web site at www.ti.com.

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