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Solving the FPGA DC Power Problem (.PDF Download)

Feb. 6, 2018
Solving the FPGA DC Power Problem (.PDF Download)

FPGAs are a popular choice among engineers for digital design in a wide variety of applications. They’re an alternative to microcontroller design, which requires high speed in a dedicated function. In certain cases, FPGAs eliminate the need to create an expensive custom ASIC. Their low cost and range of sizes make them useful in industrial, medical, aerospace, defense, and even some consumer products.

But while engineers are happy with their FPGA design solutions, many quickly discover that it causes another problem. Some are surprised to find that each FPGA requires multiple, critical dc voltage supplies. Four to six or more dc rails are needed in many instances, creating a need for a special power supply solution. That’s usually a big problem, but there are ready-made answers to this knotty problem.

The Power Conundrum

Most products today use standard power rail voltages of 12, 5, and/or 3.3 V. On the other hand, if an FPGA has been adopted, the power-supply voltage needs are widely different. Rail levels as low as 0.72, 0.85, and/or 1.0 V at high current levels are required. Other common FPGA rail needs include 1.5 and 1.8 V, also at a relatively high current level. The lower voltages usually power the core of the device, while the other voltages serve the memory, transceivers, IO circuits, and auxiliary circuits.

This problem shows up when special high-speed processors are being designed in, too. Again, multiple low-voltage/high-current rails are needed.

Besides the requirement for multiple rails, each has its own specifications for current, voltage accuracy, ripple, load transients, and sequencing. The figure shows common solution. One of the main power sources is stepped down with a dc-dc converter to form an intermediate rail. Then the individual power rails are created with a point-of-load (POL) regulators, switchers, or LDOs as seen fit. And a sequencer is essential.

FPGAs are typically powered by individual POL regulators driven from a common power rail.

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