Stabilize SMPS With Slope Compensation Resistance

Current-control switching-mode power supplies (SMPS) are gaining in popularity because they allow pulse-by-pulse current control and monitoring, making them more reliable and robust than their voltage-controlled counterparts. Current control also eliminates a positive zero in some transfer functions, which makes the supplies more stable. However, at pulse duty cycles above 0.5, current-control SMPS become unstable, oscillating at half of the switching frequency.1

To stabilize the circuit, the designer must change the slope of the pulses going to the pulse-width modulation (PWM) comparator.2 This can be done by adding a sawtooth voltage derived from the voltage across the timing capacitor to the voltage developed across the current-sensing resistor. Or, you can add a high-enough current slope to the slope-shaping resistor before summing the voltage across the slope-shaping resistor and the current-sensing resistor in the current-sensing transformer’s output circuit.

This idea describes how to compute the value of the slope compensation resistor, Rsl, that will create the desired voltage pulse slope. The analysis uses Figure 1, which is part of a bridge converter that is a component of a current-control SMPS. Although the figure is a simplified schematic that denotes rectifiers as diodes and does not show the full bridge, it is suitable for this analysis.


1. This simplified schematic of part of a bridge converter that is a component of a current-control SMPS illustrates how designers can compute the value of a slope-compensation resistor to ensure stable operation.

The voltage pulse slope is sent to the current-sensing input of U1, an LTC3722-1 synchronous dual-mode phase-modulated full-bridge controller with an internal current-ramping source whose peak current reaches 74 µA. This internally generated current creates the compensation slope that adds to the slope of a pulse that is developed across the current sensing resistor, Rcs, making the current feedback loop stable at any duty cycle.

The computation starts with the known factors: the SMPS output power, voltage, switching frequency, and other parameters that are obtained during the power supply analysis. Assuming that the pulses across the secondary winding of transformer TR have an amplitude of Vsec, and neglecting the voltage drop across rectifier D2, which may be a synchronous low-dropout type:

Vload = Vsec × D (1)

where D is the duty cycle of the rectified pulses. Note that Vload is not the rms value of Vsec. Then, the current ripple in the filter inductor, ∆iL, is:

where Lfilter is the value of the filter inductance and τ is the duration of the output pulse. Substituting Equation 1 into Equation 2:

with a switching frequency of fsw and τ = D/fsw:

with a transformation coefficient or windings turn ratio of Ntr for TR of:

Ntr = w2/wl

and a MOSFET source current of:

∆il = ∆iL/Ntr

Equation 4 becomes:

Assuming that the current transformer, TC, has one turn on the primary side and wct turns on the secondary, and the current-sensing resistor current is ∆ics:

∆ics = ∆il/wct (6)

Substituting Equation 5 into Equation 6:

Then, the voltage across Rcs is:

From Figure 2, Slopecs = Vcs/τ:


2. The SMPS stabilization technique uses a sawtooth wave that changes the slope of pulses coming into the controller, U1.

The voltage slope, Slopesl, created by U1’s internal current generator, Isl, or by an external component is:

Equation 10 ignores the value of Rcs, which is much smaller than Rsl. Slopesl should be equal to or greater than 0.5 Slopecs. So:

Then:

and:

The value of Rcs is obtained by using the ratio of U1’s sensing voltage to the operating current, scaled by the current transformer.

Sometimes, however, the IC’s current-sensing input has a current-limiting threshold, Vth. If needed to avoid reaching the current-limiting mode, Rcs may be calculated using:

Now you can calculate the Rcs value that will ensure smooth operation of the power supply in the normal mode:

After making this calculation and selecting a standard value, you can use that value in Equation 12 to compute Rsl.

If the controller IC that you employ does not provide the required current sawtoooth waveform, you can derive it from the voltage across the timing capacitor. Just add a simple power amplifier based on two complementary bipolar transistors.

References

  1. Average Current Mode Control of Switching Power Supplies,” Lloyd Dixon.
  2. LTC3722-1/LTC3722-2 Synchronous Dual Mode Phase Modulated Full Bridge Controllers.”
  3. Modelling, Analysis And Compensation Of The Current-Mode Converter.”

 

Discuss this Article 4

pschime1
on Jan 31, 2013

Good article Greg. Nicely done. But I don't think you have spent much time working with current mode control on the bench. If you did, you'd have seen and then later derived in disbelief that the fast inside current loop in avg current mode or peak cmc removes one of the poles in the double pole filter formed by the output inductor and capacitor. Further, it gives you a built in 'feedforward' in that it corrects for input perturbations as fast as the pwm comparator can see the deviatiation in the V/L of the output filter inductor. Not actually a feedforward, but WAY quicker than the voltage loop. As for stability, yes, the academics will all agree that slope compensation is NEEDED to reset the ramp signal to the PWM at duty cycles above 50%. it's easy enough to draw that out on paper considering di/dt in a reasonable inductor at high duty cycles. Without 'something' to bring that ramp down to zero, it simply ratchets up to the pulse by pulse current compliance point. This action occurs as you say at a subharmonic....not always half of the switching frequency, but often times it is. Another key point that is often overlooked in the academic is that of noise. Most pwm's require a little slope compensation at very light load. imagine an output current near zero. What then is di/dt?(small) How much energy is needed in the output inductor on a cycle by cycle basis to produce that very low output current (power)? (near none), thereby the ramp peak cmc ramp is very small at that point and a little input from the pwm sawtooth makes things much more deterministic. Not required in theory....but it does make life a hell of a lot easier.

I'm a big fan of peak CMC. Used it a LOT. I've also met and hung out with Cecil Deisch....the guy that invented the whole thing back at bell labs. He invented it to stabilize a push pull converter and keep the transformer core from walking into saturation with a slight V*t imbalance in the core. It was demonstrated to correct this on a cycle by cycle basis.

don't get me wrong, I like what you wrote, but you might want to spend a little more time working with these things on the bench. The bigger and gnarlier it is, the faster you learn. Build up an 5KW arc welder with peak CMC....you'll get a feel for it quickly.

pschime1
on Feb 1, 2013

One other notion: if most pwm's operate from a single positive rail, such that the ramp from Ct is a positive voltage with reasonable amplitude, why would I need two bipolar transistors to buffer that signal? One NPN emitter follower, generally connected (collector) to the reference voltage on the PWM, base to Ct, E into the node that sums the inductor current with the Ct ramp signal is usually sufficient. I can't see what the pnp device would do into that resistive node (assuming it is also configured as emitter follower, C tied to return. If there were appreciable capacitance there, then yes, the pnp would bring it down quicker, but why would there be appreciable capacitance at that summing node? Also, not to nit pick....but your implementation of a current transformer needs a little more consideration. I guess you could call it a generic block diagram, but you need something to clamp the reset voltage of the CT secondary. Most do this with a very high resistor value directly across the CT. It doesn't burden the forward pulse that you are controlling off of, but it allows the opposite reset waveform to develop a high enough voltage to reset the structure. Whats the reset voltage with an infinite reset resistance driven by a current source? (high enough to avalanche your 1n4148 rectifier diode that you use in the forward direction on the CT). thereby the reset resistor across the CT is needed.

cyberjudi
on May 16, 2013

Agen bola terbesar dan agen sbobet ibcbet terpercaya.Menyediakan taruhan judi bola di indonesia dan game casino sbobet casino online & 338A

Jack Russell
on May 21, 2013

Truly tremendous vocation with the blog. I do reminiscent of your tough occupation and will stop for more post from you as post gave me pleasure and gives some helps to do same work right here. Thanks a lot…………………………
Texas business valuations

Please or Register to post comments.

Search Parts

 

powered by:

 

 

Newsletter Signup

Forums

Pick Your Components With Confidence:
"Here are the procedures can help you
make the right choice..."

Search Parts

 

powered by:

 

 

Newsletter Signup

Connect With Us