Fig 1. This efficient pre-regulator for a dc power supply uses an optical feedback loop to minimize dissipation rather than the traditional optically isolated TRIAC drivers.
Fig 2. The PSpice simulation of Q1EC versus the regulator’s input voltage demonstrates how the light-dependent resistor creates a closed-loop control region.
Fig 3. The use of a half-bridge, self-oscillating SMPS instead of a standard transformer-rectifier-filter combination reduces the power supply’s overall size.
Fig 4. Experimental results from the power supply confirm its low dissipation and good efficiency.
Adding a relatively efficient pre-regulator at the input of a dc series-pass regulated power supply minimizes power losses, especially at low output voltages and high currents. Typical applications employ optically isolated TRIAC drivers using pulse control.
This idea implements a pre-regulator using a novel analog optical-feedback loop combined with an LED and light-dependent resistor (LDR). When applied to a 24-V, 1-A variable dc power supply, the linear regulator dissipates less than 7 W.
The dc power supply’s input stage is a standard TRIAC light dimmer fed by the 230-V, 50-Hz mains (Fig. 1). The LDR, which is connected across R8, has a typical no-illumination resistance of 1 MΩ and a fully illuminated resistance of a few kilohms. The variation of the effective resistance across R8 combines with capacitance C1 to create a reduced-amplitude and phase-shifted drive.
When this drive exceeds the 30-V threshold of the DIAC (D2), the gate of the TRIAC (Q2) triggers. This effectively controls the conduction angle of the 50-Hz supply, from typically 20° (minimum output) to 170° (maximum output), which correspond to the no-illumination and full-illumination conditions.
The TRIAC-controlled ac input to the switched-mode power supply (SMPS) stage generates a variable dc input to the linear regulator stage, which uses an LM117 (U1). R9 adjusts the output voltage from 2.5 to 24 V, and Q3 combines with R11 to provide short-circuit protection, which is limited to 1.25 A. R1 limits the peak current drawn from the mains, and R10 bypasses the TRIAC circuit, supplying current for startup and light load conditions. R8 is adjusted to provide the initial trigger for the TRIAC with the LED not illuminated.
The heart of this design is the optical-feedback circuit consisting of PNP transistor Q1, which drives a red LED housed within a dark enclosure along with the LDR. Divider R5/R4 compares the voltage across the linear-regulator against the forward-biased diode voltage of D1, changing the emitter-to-collector voltage of Q1. This change varies the current in the LED.
An increase in LED current increases the light on the LDR, reducing its resistance. This increases the TRIAC conduction angle, raising the dc voltage at the input of U1. Closed-loop operation with negative-feedback control requires the current through the LED to decrease when the voltage across U1 increases.
Figure 2 shows the PSpice simulation results of Q1’s emitter-collector voltage (Q1EC), as the voltage across U1 is increased while VOut is fixed at 5 V. At power ON, an initial dc voltage is developed at the input of U1 through R10 by setting R8 to provide a minimum conduction angle for the TRIAC.
Q1EC shows a desirable initial increase corresponding to an increase in illumination, which leads to the pre-regulator voltage momentarily going to the maximum. The negative-slope in the closed-loop control region results when the illumination decreases and the pre-regulator settles to a U1 input nominally 4 to 5 V above VOut.
Instead of a standard 50-Hz transformer-rectifier-filter combination, the pre-regulated supply uses a half-bridge, self-oscillating SMPS as an intermediate stage (Fig. 3). The SMPS reduces the power supply’s overall size, while providing 1 A dc at an output of 4 to 40 V as the ac input is varied from 24 to 230 V.
D3-D6 and C6 full-wave rectify and filter the ac voltage from the TRIAC and provide dc voltage across the totem-pole connected transistors Q4 and Q5. This topology self-oscillates in hard-switching mode, generating a square wave at a frequency determined by the alternating positive and negative saturation of the transformer core.
With T1 fabricated as shown, the converter operates at 10 to 50 kHz, the frequency increasing with input voltage and load. Schottky diodes D9-D12 and capacitor C7 rectify and filter the output to provide a dc input to the linear regulator stage.
The experimental results demonstrate the pre-regulator’s effectiveness in the 24-V dc power supply (Fig. 4). The circuit’s dissipation is less than 7 W for a 1-A load. The efficiencies for the SMPS and overall circuit are also shown. This technique can also be applied to power supplies with higher ratings.