Analog/mixed-signal design has long been plagued by bottlenecks, many of which concern modeling and simulation of the analog portions of circuitry. There have been many attempts over the years at improvements in the process of creating analog models for design and verification, but fundamentally, the process has not changed a whole lot. Models are by and large still coded by hand in a hardware-description language (HDL), with all of the baggage attached to that approach, including the difficulty of writing them accurately, maintaining them, and reusing them efficiently.
A few years ago, Lynguent appeared with a new graphical approach to the creation of models. The company’s ModLyng integrated modeling environment (see the figure) resembles nothing so much as a schematic-capture tool in which designers place building blocks from a library, connecting their ports to describe the functionality of the model. It’s an approach that isn’t unlike what’s done with the MathWorks’ Matlab and Simulink.
Now, having proved the viability of the ModLyng concept, Lynguent is poised to move to the next level. Under the guidance of newly appointed CEO Sam Young (with 35 years of experience in the semiconductor industry, most recently with Contour Semiconductor), the company now seeks to broaden deployment of the ModLyng environment beyond chip-level analog/mixed-signal design.
“We have products for board-level design in the queue,” says Young. These products will allow Lynguent to deliver electronic datasheets along with models. Additionally, according to Young, Lynguent’s products are applicable to green energy and power-related applications. “The basic tool is fully functional for support of Smart Grid and electric-vehicle power-train applications.
Another niche area for the Lynguent technology is radiation-hardened design. The tool enables designers to predict radiation hits and their effect on the circuit, including parameters such as transistor corruption. Today, that capability is useful primarily in the military/aerospace realm, but Young is looking to a time in the not-so-distant future when on-chip geometries are so small that radiation hardness becomes a terrestrial problem. This might occur at 45 nm or at 32 nm and below.
The ModLyng modeling environment can be used at any point in either top-down or bottom-up methodologies. “Early on, we’re used for a bottom-up flow. But we’re finding that people want to start at requirement level and do a top-down flow,” says Young. Creation of models begins with library elements that are manipulated within a topology editor. Just as in a schematic-capture environment, the elements are simply wired together. Models can be exported in the users’ preferred flavor, including Verilog-A, Verilog-AMS, VHDL-AMS, or MAST.
Lynguent’s team is aiming at what Young terms “full-circle IP integration.” Whereas most designers think in terms of intellectual-property (IP) integration happening at chip level, IP integration happens at the supply-chain level as well. “Integrators of IP at whatever level they’re working become creators of IP for the next higher level in the chain,” says Young. “Hard IP goes into chips, chips go onto boards, and boards go into systems.”
One example of where Young hopes to drive the ModLyng environment is total vehicle simulation for electric vehicles. “When you deliver a component, you also have to deliver documentation,” says Young. “You can take a model and generate a datasheet from it, or you can take a datasheet and build a model from that.” The end result is that IP creators can reduce time-to-market by being able to supply a simulation model to their customers long before they build a board or system.