Ultra-High-Density Cell Library Shrinks Area, Power Usage

Aug. 4, 2003
Through use of an ultra-high-density standard-cell library added to the ASAP Logic family, designers can achieve up to 30% improvements in logic-block area usage while typically consuming up to 20% less power than conventional architectures. The...

Through use of an ultra-high-density standard-cell library added to the ASAP Logic family, designers can achieve up to 30% improvements in logic-block area usage while typically consuming up to 20% less power than conventional architectures. The smaller, more routable cells leverage lower device capacitance and shorter wire lengths to achieve the power-consumption gains. Prices start at $25,000.

Virage Logic Corp.www.viragelogic.com

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