A high-side current-sense amplifier typically amplifies the differential voltage across a sense resistor and provides an output voltage proportional to the current in that resistor. The amplifier rejects the common-mode voltage on which the sense-voltage rides. Such devices, therefore, can be used to detect overcurrent faults in a load or to make system power-management tradeoffs.
Most high-side current-sense amplifiers are well suited for situations in which the common-mode voltage ranges from ~2 V above ground to more than 30 V. Some industrial and automotive applications, however, require protection for the amplifier against reversed-battery connections. Also, for some loads, the amplifier needs protection against inductive kickbacks and other negativevoltage transients.
If the common-mode voltage goes negative (below ground) during these events, excessive current flow through the internal ESD diodes can damage the sense amplifier. For example, in a representative high-side current-sense amplifier (MAX4080), a negative voltage much below ground at RS+ or RS- will draw a large current by turning on one of the internal ESD diodes, D1 or D2 (Fig. 1).
One method of protecting the current-sense amplifier is to connect external series diodes from the sense resistor to the RS+ and RS- pins. During normal operating conditions, though, any mismatch in the forward-voltage drops of these diodes can seriously degrade the current-sense amplifier’s precision input characteristics (VOS = 0.6 mV max).
A better solution is to connect PMOS transistors in the RS+ and RS- paths as shown. The PMOS switches are ON in the presence of positive common-mode voltages, allowing the IC to operate normally. When the common-mode voltage goes negative, the FETs instantly turn OFF. This essentially inserts a reverse diode between the sense resistor and input pins, preventing the internal ESD diodes from turning ON.
The PMOS switches have very low on resistance: typically much less than an ohm. Because MAX4080 bias currents are also low (12 µA max), this on resistance causes only a negligible voltage drop in its path, and therefore it has a negligible effect on the IC’s input offset voltage.
The waveforms of Figure 2 illustrate how the protection circuit works, using the MAX4080’s gain-of-20 version. A differential test signal applied between RS+ and RS-, consisting of a 100-mV p-p sine wave riding on a 200-mV dc offset, rides on a common-mode voltage that varies between -20 V and +20 V. When the input common mode is 4.5 V or higher, the output is 4 V dc (200 mV × 20) with a 2-V p-p sine wave riding on it, as expected for normal operation.
When the input common-mode voltage becomes -20 V (goes below ground), the PMOS switches turn OFF to protect the part, and the output sits at 0 V. When the common mode recovers (i.e., above 4.5 V), the IC again behaves normally. This scheme works equally well for reversed-battery protection, even if VCC = 0, as is often the case when one imposes a reverse-battery condition.