For leading-edge devices such as RF ICs, increasing frequency, package density, and thermal issues offer significant challenges to designing effective socket and load-board solutions for test. Standard injection-molded sockets rarely are suitable for today’s diverse packages and typically fail to support increasing numbers of insertions needed to avoid refixturing delays, idle testers, and slower product delivery. Similarly, manufacturers increasingly experience problems with load boards designed with little consideration for matching the performance characteristics of the socket.
IC designers are combining higher frequencies with advanced signaling techniques such as low-voltage differential signaling (LVDS) methods to enhance performance. As a result, test engineers find they need to provide better control and cleaner signal paths through both contactors and load boards.
In the recent past, when 100 MHz was considered very high-speed performance, longer contact test sockets were adequate, and socket characteristics of 7 to 8 nH and 3 to 4 pF were satisfactory. Today, advanced devices operate at frequencies well above 1 GHz and feature low ps rise times.
For these devices, even socket characteristics as low as 1 nH and 0.5 pF are marginal in test conditions that need to measure signals with voltage swings of less than 1 V. In this operating environment, pogo pins begin to act like transmission lines, and test engineers need to deal with more exacting contactor requirements, carefully tailoring the pin to the application.
By leveraging emerging high-density process technologies, chip manufacturers pack more function into smaller packages. Smaller packages mean smaller pin-to-pin pitch and increased board complexity that push the envelope for manufacturing capabilities (Table 1).
| Year | System Clock | PCB Complexity | Minimum Line Width/Space |
| 1970 | 2 MHz | 2 layers | 0.1”/0.1” |
| 1980 | 10 MHz | 4 to 8 layers | 0.020”/0.020” |
| 1990 | 100 MHz | 8 to 12 layers | 0.006”/0.006” |
| 2000 | 1 GHz | 12 to 24 layers | 0.002”/0.002” |
Currently, board manufacturers support designs of 0.75-mm pitch on 200-mil boards that are required to withstand handling and mechanical forces on the test head. Even this high-density pitch is insufficient for high fan-out load boards needed for testing high pin-count devices such as systems-on-chip (SOCs).
Load-board experts can solve this problem by using a two-step solution: a thinner board for high-speed signal fan-out combined with another board for remaining signals, power, and ground. By combining these two types of stack-ups, engineers can deliver 200-mil boards with 0.5-mm pitch needed for very high-density packaging requirements.
Some IC manufacturers often attempt to tackle test by acquiring sockets and boards from different sources. Without significant qualification of the sockets and boards, manufacturers typically are disappointed by the results.
When device tests fail, there is a scramble to find bugs in test programs or faults in device design. Actually, the problem could lie in something as simple—and insidious—as a load board impedance of 43 W rather than the proper 50 W. In fact, in a subtle signal environment such as LVDS, load boards sometimes are built with a single 100-W load or without the very close edge-trace tolerances needed to resolve LVDS transition times.
The result is failures at device test and costly delays as engineers struggle to identify the source of the problem. Manufacturers simply cannot afford delays and complications due to test problems that arise from building sockets and boards separately without regard to the complete device test requirements.
One of the first steps in creating suitable socket and load-board solutions involves early consultation on alternatives and trade-offs between chip-design teams and socket/board designers. Yet, few companies have access to internal engineering resources with the necessary experience not only with advanced socket and board design but also with tester capabilities. Outsource service providers such as Dimensions Consulting have the knowledge and experience needed to intervene with design teams early in development.
For example, we applied an integrated design approach to a test fixturing problem that required creating a socket and board solution as a single unit. In this case, an integrated design was required because the target device combined frequency requirements above 1.6 GHz and tight mechanical tolerances of 0.75-mm pitch, which only could be satisfied through a unified socket and board approach. Also, the design needed to be completed within a three- to four-week window to meet the customer’s schedule.
In addressing this design, our engineers worked closely with product engineers, gathering all pertinent mechanical and electrical design data needed to create an effective solution. The engineers used SPICE-like transistor-level simulation methods to model socket and board electrical characteristics using actual data extracted from board signal traces. These methods permitted detailed analysis of the complete test signal path.
Exhaustive in-house test of the integrated design allowed the team to quickly identify problems and optimize the design. Completed in only three weeks, the resulting design met all electrical and mechanical objectives (Figure 1).
Along with technical expertise, outsource shops also serve as a critical link in helping companies leverage tester capabilities and accommodate tester limitations. As a result, service consultants and design teams can create the kind of out-of-the-box electrical and mechanical solutions that are increasingly needed to address emerging package and test issues.
Conclusion
Under pressure of increasing frequency, density, and thermal requirements, leading companies are looking for custom test sockets and load boards designed and optimized as a single unit. Leading outsource providers can offer the engineering expertise and test knowledge needed to rapidly deliver complete socket and load-board solutions to cope with rising device complexity. The solutions are customized, tuned, and verified to meet the specific needs of the customer, the devices, and required test environments.
About the Author
Zaid Ayoub is the director of marketing at Dimensions Consulting. Previously, he worked at National Semiconductor. Mr. Ayoub holds a B.S.E.E. in computer architecture and an M.B.A. from Santa Clara University. Dimensions Consulting, subsidiary of Credence Systems, 3350 Scott Blvd., Bldg. 58, Santa Clara, CA 95054, 408-988-6800, e-mail: [email protected]
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August 2002