Over the last year, Qualcomm has been scaling back plans to move into data centers. In a retrenchment of one of its most ambitious efforts, the company has cut hundreds of employees that worked on its Centriq server chips, which are based on the same energy efficient Arm technology used in its mobile chips. Competitors trying to steal some of Qualcomm's thunder have started hiring the castoffs.
The company's change of strategy is the latest in a long line of setbacks for server chips based on the Arm architecture. Calxeda closed its doors after struggling to create server chips based on Arm's Cortex cores. Broadcom dropped the development of its Vulcan core, which Marvell Technology is trying to reintroduce in its products. Applied Micro sold its 16-nanometer Gene-X technology to the Silicon Valley startup Ampere Computing.
Now Arm, which offers customers the blueprints to its processor cores, has started taking matters into its own hands. Last week, the company, released its first chip designs dedicated to data centers. The chips are the latest in its Neoverse product line, which is targeted at internet infrastructure. They are destined for data centers used in cloud computing in addition to switches, routers, base stations and other devices that move data around.
The N1 and E1 cores aim to compete in the high-end server chip space. Arm technology has long been seen as an alternative to Intel's Xeon and AMD's Epyc processors by offering higher performance per watt. That could help cut costs for corporations that own data centers. Intel is the white whale of the product segment, holding more than 98 percent market share in server chips, which can cost thousands of dollars each.
Last year, Amazon added a custom computer chip based on Arm's Cortex technology to its data centers, which it rents out to other businesses over the cloud. The Graviton processor provides up to 45 percent lower costs compared to Intel's chips depending on the cloud application, according to Amazon. With its latest server cores, Arm is trying to lower the bar for other companies to take advantage of the same energy efficiency gains.
So the company has started to create solutions specifically for corporate computers. The first generation of server chips in the Neoverse product line are based on Arm's 16-nanometer Cosmos platform. The technology was introduced last year and includes the company's Cortex-A72, Cortex-53 and other 64-bit architectures when used in infrastructure. Arm said every generation would have 30 percent higher performance than the last.
But the company is flying out the gate with its latest core. The N1 processor provides 60 percent more performance at the same frequency as Cosmos, according to ARM. Based on Ares technology, the core is a workhorse bred for powering servers used in cloud computing. The 7-nanometer core is also 30 percent more energy efficient using the same process node as the Cortex-A72 core, its counterpart in the smartphone space.
The Ares platform is all about sustained performance. The processor’s pipeline is designed to expand and contract like an accordion depending on the instructions sent to it. A novel memory architecture offers lower latency, higher bandwidth and the ability to stitch together lots of cores into a single system-on-chip. Each core, which can be licensed by vendors, also contains Arm's Neon technology for speeding up artificial intelligence jobs.
Customers can connect up to 128 cores using the processor's high bandwidth, low latency mesh interconnect. The mesh architecture also eases the challenge of adding accelerators for artificial intelligence and other chores, opening the door to a wider range of custom designs, according to Arm. The core also supports cache coherency, which helps pump up the performance of systems that have to orchestrate so many processor cores.
The core can be used in a wide range of different infrastructure devices. Arm said that server chips could end up combining 64 to 128 cores while burning through more than 150 watts. Chips featuring 16 to 64 cores and 35 to 105 watts of power consumption could be used in server sitting on factory floors. The company estimated that networking and storage devices would use chips that contain 8 to 32 cores sustained on 25 to 65 watts.
But manufacturing chips with so many cores can be costly. Users can split the largest processors into chiplets, modular slabs of silicon that can be assembled on the same substrate to function as a single chip. Arm said that a 64-core processor could be sliced into separate 16-core chiplets stitched together by the interconnects branching out of each die. That is how AMD designed Rome, its latest line of 64-core, 7-nanometer server chips.
The N1 core is focused on processing data as fast as possible, but the E1 core is focused on moving it around as fast as possible. The high throughput chip is targeted at cellular base stations and edge servers located on the edge of the network near billions of Internet of Things devices. Code named Helios, the chip can also be dropped into switches and routers used in remote data centers were all the data from these devices is amassed.
"All these intelligent devices mean data consumption models are going to change over the next several years, driving a shift in the way information will be stored, processed and managed," Drew Henry, senior vice president and general manager of Arm's infrastructure business, said in a statement. "The explosion of data will require more than just increased compute performance; a second important dimension is moving the data around."
The 7-nanometer chip provides 2.7 times the throughput and 2.4 times the energy efficiency of the Cortex-A53 core while doubling its performance, according to Arm. The 64-bit processor also contains cryptographic cores for running encryption and decryption. The out-of-order architecture is designed to handle instructions that are ready to be executed. These instructions are bumped ahead of operations awaiting additional data.
It also supports simultaneously multithreading, which Arm introduced last year in its latest Cortex-A65 core for moving data as fast as possible inside autonomous cars. With it, the processor can handle more than one thread at a time, hiding memory latency within the thread, according to Arm. That results in higher throughput and energy efficiency for base stations used by 5G networks or high-performance switches slipped into data centers.
The processor can be grouped into 8-core clusters and combined in different ways depending on the application. Lower power consumption also means more power can be spared for peripherals, such as radios, digital signal processors and other accelerators. Customers can also combine the E1 and N1 cores in chips targeting routers or network interface controllers, said Tim Trepetch, a senior product manager for Arm's infrastructure unit.
The center of gravity in the semiconductor industry has started to shift from general-purpose processors to custom chips as Moore's Law continues to wind down. "We are entering a new era driven by a greater diversity of specialized compute and the need for flexible architectures"—including Ares—"tailored to meet application specific needs," Henry said in a statement. He added that "the days of one-size-fits-all computing are over."
