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Intel to Introduce Chips Based on 7-Nanometers in 2021

May 9, 2019
Intel to Introduce Chips Based on 7-Nanometers in 2021

Intel is trying to leave the past behind. The $70-billion company plans to fundamentally reset its chip development process after severe delays derailed its 10-nanometer node and dulled its manufacturing lead. During the company's annual investor conference Wednesday, Intel said it would start shipping its first 10-nanometer server chips in the first half of 2020 and its first 7-nanometer products in 2021. 

The 7-nanometer node will deliver double the area efficiency of its 10-nanometer process. Chips based on 7-nanometer will also offer 20% higher performance per watt. Intel's first 7-nanometer chip is projected to be a discrete data center GPU based on its Xe architecture. "We've made time-to-market the priority," Chief Engineering Officer Venkata Renduchintala said at Intel's headquarters in Santa Clara. 

Cleaning up its manufacturing operations and repelling rivals eroding its market share lead are among the challenges facing Robert Swan, who took over as Intel's chief executive officer in January. Intel has had trouble moving on from its current 14-nanometer process node. But contract chip manufacturer TSMC has started producing chips based on 7-nanometers for Intel's closest competitors, including AMD. 

Swan has also had to confront a sudden slowdown in chip demand. Intel's sales are projected to grow by low single-digit percentages from 2019 to 2022. High single-digit growth in its data-centric products will be dragged down by low single-digit declines in its personal computer unit, Swan said. Last month, Intel cut its estimated total sales in 2019 from $71.5 billion to $69 billion, down from $70.8 billion in 2018.

Slowing sales growth has been had for shareholders to stomach. Intel's share price has increased 5% over the first and second quarters of 2019. Nvidia's stock has swelled 28% and AMD's 44% over the same span. To soothe shareholders, Swan repeated what has become a mantra among Intel's executives: success in the semiconductor industry today is about having the best products, not the best process node.

Despite holding more than 95% market share in server chips and more than 80% in the personal computer space, Intel’s manufacturing mistakes may leave it vulnerable. Nvidia’s early lead in the artificial intelligence chip market threatens to marginalize Intel in the data center space. AMD, led by chief executive officer Lisa Su, is mounting its latest assault on Intel with its second-generation Ryzen and Epyc chips. 

Intel's production problems may put it behind AMD, which contracts out chip production to TSMC. AMD plans to release CPUs and GPUs based on TSMC's 7-nanometer technology before Intel's 10-nanometer chips. That could give AMD a slight edge in the market for high-performance processors in data centers and personal computers. Intel's 10-nanometer roughly rivals TSMC's 7-nanometer, industry analysts say.

Intel said it would start shipping its 10-nanometer Ice Lake mobile processors before the end of the current quarter. The Ice Lake chip will be inside client devices by late 2019. The company also plans to deliver its first 10-nanometer FPGA in the second half of 2019 and its first 10-nanometer data center CPU in the first half of 2020. Intel also restated its plan to release its 10-nanometer general-purpose GPU in 2020.

The Silicon Valley company has learned from its failure to finish the 10-nanometer on time, said Redunchintala. Intel's power, cost, performance and area goals were too ambitious. The company miscalculated how long it would take to meet those goals, leading to delays. “But ultimately when you put all of that chemistry together, we clearly underestimated the challenge ahead of us,” Redunchitala said last August.

The challenges led to the demise of Intel's tick-tock development, the company's playbook for producing smaller, faster and cheaper chips. For almost a decade, Intel iintroduced a new process node every other year—the "tick"—and a new chip architecture in the alternate years —the "tock"—which is represented by the "+" in the name. But amid delays in 10-nanometer development, Intel scrapped the strategy in 2016. 

To compensate for the slowdown in Moore's Law, Intel changed up its playbook. Intel said it would update every chip architecture the year after it was introduced and before shifting to a new process node. The additional step is reflected by the "++" in the node name. Intel said its 14++ technology offers 20% more performance than 14+, which offers another 20% of performance on top of the base 14-nanometer node.

That represents the new normal for Intel, the world's second largest supplier of chips. The company plans to start 10+ production in 2020, 10++ in 2021, 7+ in 2022 and 7++ in 2023. The 10-nanometer node is projected to have a significantly shorter lifespan than 14-nanometer, Renduchintala said. The 7-nanometer node is seen as corresponding to TSMC's 5-nanometer, which is set to enter volume production in 2021.

"We plan to deliver sustained process advances, with new nodes and within each node," Renduchintala said. “We will deliver one Moore’s Law of scaling at the beginning of the process node and another Moore’s Law of performance by the end of the node." Intel is also doubling down on its development of packaging, architecture, memory, interconnects, security and software to pump out more performance, he said.

Intel is also moving to respond faster to what customers want. Last year, Intel introduced a new way to build chips out of small units of silicon, or chiplets, including CPUs, GPUs and other ICs and IPs based on different nodes, to create custom chip designs. Intel’s 3D stacking technology, Foveros, and 2.5D packaging process, EMIB, can also enhance energy efficiency and reign in chip developemnt costs and time. 

Advanced packaging aims to make chip design more like circuit board development. Chiplets are connected with high-bandwidth interconnects so they act as though they share the same die. Intel said the first product based on Foveros technology, Lakefield, will start shipping late in 2019. The chip combines a single 10-nanometer, high-performance Sunny Cove core and four 22-nanometer low-power Atom cores.

“Intel is expanding the formula of integration well beyond the single die,” Renduchintala said.

About the Author

James Morra | Senior Editor

James Morra is a senior editor for Electronic Design, covering the semiconductor industry and new technology trends, with a focus on power electronics and power management. He also reports on the business behind electrical engineering, including the electronics supply chain. He joined Electronic Design in 2015 and is based in Chicago, Illinois.

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