There ain’t no such thing as a free lunch (TANSTAAFL), but Xilinx and Arm are making it easier to use soft-core, Cortex-M1 and Cortex-M3 platforms on Xilinx FPGAs (Fig. 1). Through an enhancement to Arm’s DesignStart program and Xilinx’s Vivado FPGA development tool, developers will have a no license fee, no royalties access design model for access to these cores when used on Xilinx’s FPGAs.
Like many free things, there’s a long-term cost depending on where things go. For example, if the end goal is an ASIC that’s being prototyped in an FPGA, then the ASIC will have licensing fees. However, these would likely be needed anyway. This new announcement just greatly reduces the startup and development costs related to the soft-core processors.
1. Xilinx and ARM joined forces to deliver the Cortex-M1 and Cortex-M3 soft cores across Xilinx’s FPGA families.
Alternatively, the soft cores help sell Xilinx FPGAs that will be used for development and even deployment of applications. Of course, designs that employ multiple soft cores will likely need larger FPGAs to accommodate the additional peripheral support that comes with more cores.
Adding soft cores to FPGA-only devices like the Spartan and Artix lines is often needed to control or configure the custom logic in the rest of the FPGA. The soft cores also make sense in Zync SoCs that include hard-core Cortex-A and Cortex-R processors (Fig. 2). As with discrete hardware designs, the microcontrollers handle jobs that might require deterministic timing or are lightweight control functions that would be overkill if implemented in software running on higher-end processors.
Designers can choose from the low-end, power-efficient Cortex-M1 or the more powerful Cortex-M3. The Xilinx Vivado IDE takes advantage of the AXI interface support added to these soft cores, allowing for drag-and-drop configuration of peripherals and interrupt controllers that use the interface to tie together the devices.
2. A Cortex-M is often complementary to hard cores found on the Xilinx Zync SoC family; it provides control capabilities more efficiently than on a hard-core Cortex-A.
The advantages of using the Cortex-M family are numerous—many developers have already been using them. It just costs a lot less now. Developers will be able to easily migrate code running on external devices into the FPGA as well as having a standard platform in the FPGA for software development. The cores are supported by third-party tools as well as Arm’s Keil MDK software-development suite that supports hard- and soft-core ARM processors.
The soft cores don’t take advantage of the newer Cortex-M33 architecture that includes security features above what’s available in the Cortex-M3. FPGA implementations of the Cortex-M3 and Cortex-M1 on an FPGA do have advantages, though, since some of the security functionality can be included via the FPGA fabric.
The partnership is obviously advantageous to both parties and developers. The rise of RISC-V may have had an impact as some RISC-V designs have been available for free for FPGAs. RISC-V also has extensive software support, often through open-source tools. The one thing that RISC-V lacks is compatibility with existing commercial hardware, while on the other hand, Cortex-M0 and Cortex-M3 platforms are numerous. There are over 3,000 SKUs available at this point, not including the many custom designs that include these hard cores.
The Arm soft cores are also complementary to Xilinx’s own scalable MicroBlaze soft core. The two soft-core families will coexist with designs and developers that already utilize the MicroBlaze typically choosing to remain on the platform that is also free. The ARM platforms provide more mobility from a design and software perspective to and from the FPGA environment.
Granted, most embedded applications are written in a high-level language like C or C++, but migration even across “identical” platforms can be a challenge. Migration across dissimilar platforms can be a nightmare especially when dealing with peripherals.
The free availability of these soft cores will likely enhance open-source development on Xilinx FPGAs since designs can be freely exchanged. They provide a standard and flexible software programming base that can be easily enhanced for delivery on FPGAs or for designs that will eventually move to ASICs.
