DesignCon 2024

Check out our coverage of the latest technologies and solutions on display at this year's DesignCon.
Andrei Dzemidzenka, Dreamstime
April 3, 2024
Learn more about Pike Creek and its potential implications as the first test chip featuring chiplets linked by the UCIe standard.
Muhammad Shoaib, Dreamstime
March 27, 2024
Cadence is trying to turn down the heat in everything from chips to circuit boards to entire electronic systems with Celsius Studio.
309588159 © Alexei Onufriiciuc | Dreamstime.com
March 22, 2024
The latest Ethernet PHY and controller IP from Synopsys can crank out up to 1.6 Tb/s of bandwidth.
Warenemy_Dreamstime
March 6, 2024
Teledyne LeCroy is upgrading its CrossSync PHY technology, which connects oscilloscopes to protocol analyzers in real-time, for the PCIe Gen 6 standard.
Astera Labs
Feb. 14, 2024
We look inside the Aries smart cable module from Astera Labs, and at why long-range PCIe connectivity has become such a critical factor in the data center.

More content from DesignCon 2024

91824901 © Forance | Dreamstime.com
Feb. 8, 2024
Explore Keysight’s Chiplet PHY Designer tool and the game-changing UCIe standard in chip design.