Silicon photonics has long been an almost-there technology. Holding it back is a shortage of software tools that allow silicon photonics to be designed the same way as traditional integrated circuits. Today, building silicon photonics is a slow process that demands deep knowledge of photonics and electronics. The endeavor is growing more expensive as more companies push to integrate photonic circuits more closely with electronic devices.
“Chip designers are not really familiar with photonics structures, and photonics designers are not really familiar with chip engineering,” said Thomas Daspit, product manager with Mentor Graphics, a subsidiary of Siemens since last year. “Now they need a knowledge of chip design to get their jobs done. We are also seeing people that are stepping into photonics for the first time, so we need to alleviate the problems that even experts run into.”
That is the reason behind LightSuite Photonic Compiler, a new product the company introduced with its customer Hewlett Packard Enterprise. The tool smooths over the integration issues that have hampered the development of silicon photonics used in data centers and other lidar sensors. It can automatically connect photonic and electrical components onto the same layout, which can be redesigned in minutes versus the weeks it would take manually.
Silicon photonics is used inside data centers to move information between towers of servers and between servers and storage. While switch suppliers are shipping discrete silicon photonics, the integration of optical components into the same package as electronics has been impeded by technological hurdles. That could change in the near future as software tools, like Photonic Compiler, which supports Python, are introduced to ease integration.
“The reason it is happening now and our customers are asking for it is that a technical need exists,” said Ashkan Seyedi, senior research scientist at Palo Alto, California-based HPE, which is betting on the market for silicon photonics. “Until now it was a technical nice-to-have and system architects figured out ways to get around obstacles by using electronics and algorithms to meet [bandwidth] demands.”
“Now all those tricks have been played,” Seyedi said. The slowing of Moore’s Law, the semiconductor industry’s economic engine for the last half century, have Hewlett Packard and rivals Juniper Networks and Cisco Systems eyeing new ways to accelerate corporate computers. Silicon photonics is one solution because it requires less energy to move data over long or short distances and generates less heat than electricity traveling over copper.
Intel has also expanded hiring for its silicon photonics business. As the Santa Clara, California-based company’s manufacturing lead has narrowed over the last year, Intel has doubled down on silicon photonics to lower the power of sending information between vast networks of data center switches and the latency of machine learning workloads. One position that still needs to be filled is Intel’s vice president of silicon photonics R&D.
“We believe we are only at the very beginning as there is massive ongoing development worldwide for further integration,” said Yole Développement’s Eric Mounier, adding that made-to-order chip companies such as Globalfoundries and TSMC are investing in silicon photonics production. However, there are still challenges to overcome. They include the high cost of packaging, production and modulator integration, Mounier said.
Manufacturers are now trying “to develop a 400G optical port over a single fiber across 500 meters at less than a dollar per gigabit and with power <5mW/Gb,” said Mounier. The market for silicon photonics transceivers is expected to grow to $4 billion by 2025, according to Yole Développement. That would represent around 35 percent of the total optical transceiver market, with the biggest application being data center networking.
“No one has ever told me silicon photonics is a bad idea,” Seyedi said. “It has just always been really inaccessible. [Without simulation software], you run into problems with optimization and the man hours required to build the circuit. If the design changes, everything has to be repeated. The new tool makes larger circuits much more tractable and also helps designers avoid mistakes because they are not doing it all manually.”
