In equation 1, ISA is the solar-array current, ISC is the short-circuit current, IS is the saturation current, A is the shaping factor, and VSA is the solar-array voltage.
Figure 1 depicts a simple circuit topology for solar-panel modeling, with three variable resistors that permit adjusting for the most important parameters: R1 for ISC, R2 for series resistance, and R3 for the voltage at the maximum power point, VMPP. Figure 2 shows an I-V experimental curve obtained from a small prototype.
The circuit implements an equivalent current source using two transistors and a diode, which actually form a circuit with two topological states. Q1 forms a constant-current source that defines ISC, and Q2 is used to subtract an exponential term of the current when the solar-array voltage goes beyond VMPP, as shown in Figure 2. Finally, diode D protects Q2 for high reverse voltage in the emitter-base junction and models the effect of current decrease in the flat region (Fig. 2, again).
In the first operating region, Q1 is working in its linear region, whereas Q2 is off and diode D is on. Under these conditions, ISA is given by: