QoriQ series overview
QoriQ P3041 overview
QoriQ P5010 overview
QoriQ P5020 overview
Freescale's latest multicore QorIQ processors target a range applications especially in the networking space from security appliances to base stations. They are also address many industrial applications from robotics to test and measurement systems. The P3 platforms takes advantage of Freescale's e500mc core. The new P5 platforms utilize the new 64-bit e5500 core. The chips are created using Freescale's 45nm SOI process.
The QorIQ line (Fig. 1) now runs from the low end, 32-bit P1 to the high end, 64-bit P5. Along the way there are a number of groups that are pin-compatible. Likewise, the new 64-bit core is upwards compatible providing a 32-bit mode the matches the lower end core. The line provides common peripherals and internally the high end chips use Freescale's CoreNet coherency fabric interconnect. The P1 and P2 chips uses a bus interface internally.
32-bit P3 Platform
The quad core P3041 (Fig. 2) introduces the P3 series. Running at 1.2 GHz, the chip consumes less than 8W. The P3 series continues to use the 32-bit e500mc core along with the CoreNet Coherency Fabric interconnet.
The P3041 is designed to handle high speed, encrypted network traffic streaming IP traffic at speeds up to 10 Gbit/s. The inclusion of Serial RapidIO acceleration highlights the P3's communication targets including wireless, media, and security gateways. The Serial RapidIO also supports Ethernet tunneling making it a gateway between the Ethernet and Serial RapidIO ports.
The secure gateway aspect of the chip is provided by a number of hardware acceleration blocks. The security engine provides encryption and authentication support at line speeds. The Pattern Matching Engine (PME) provides deep packet inspection support. The Enhanced RapidIO Messaging (Rman) system provides the tunneling support in addition to accelerating RapidIO traffic and connections.
The P3041 can handle storage chores as well with its dual SATA 2.0 controllers. Other peripheral communication interfaces include 5 Gig Ethernet controllers, 1 10Gig Etherenet controllers, 4 PCI Express 20 controllers, 2 Serial RapidIO 2.0 controllers, and 2 USB 2.0 controllers with PHYs.
The cores have their own dual 32Kbyte L1 and 128 Kbyte L2 caches. The chip shares a 1Mbyte L3 cache connected to the 64-bit DDR3 controller. The higher end P4040 has two memory controllers. The P3041 is pin compatible with the P4080, P4040, P5020 and P5010.
64-bit P5 Platform
The single core P5010 (Fig. 3) and dual core P5020 (Fig. 4) run at 2.2 GHz. Even so, the P5 series consume under 30W while handling Ethernet network traffic at 10 Gbit/s speeds. The chips utilize the new 64-bit e5500 core. They are ideal for high performance control plane work as well as high end storage systems.
The e5500 64-bit core is based on Power Architecture v2.06 with the latest 64-bit ISA (instruction set architecture). The 32-bit hybrid mode provides legacy software support. The core has been designed to run up to 2.5 GHz and deliver twice the performance of the 32-bit e500 core. The cores have a 512 Kbyte L2 cache tied to a pair of DDR3 memory controllers. It also supports a 64 Gbyte memory space. The chip has IEEE 754 double precision, floating point support.
The chips have dual USB 2.0 controllers with built-in PHYs. There is the usual complement of low speed interfaces such as SPI, serial ports, and an SD/MMC interface. The P5 series splits its 18-lane 5 GHz SERDES across a range of communication interfaces including the 10 Gbit/s XAUI Ethernet interface. There are 5 Gig Ethernet ports, 2 Serial RapidIO controllers, 4 PCI Express 2.0 controllers, and the SATA controllers.
The dual 3 Gbit/s SATA controllers are augemented by the RAID 5/6 accelerator. This allows the system to address high end SAN (storage area network) applications with ease.
The entire QorIQ series benefits from a range of software including Freescale's own CodeWarrior development tools and VortiQa software. Virtutech Simics delivers the Freescale line in the form of virtualized simulations. The chips are also support by tools from a range of other vendors such as Enea, Green Hills Software, Mentor Graphics, CodeSourcery and Wind River.
Freescales QorIQ line will continue to expand but the current crop delivers a compatible line from the 5W P1 to the 30W P5. It will be interesting to see how far down the line the 64-bit e5500 core will go. Pin compatibility, such as the compatibility between the P4 and P5 line, go a long way to providing developers with a range of solutions and migration options. Samples will be available in Q4 2010.
