Ninety percent of new intellectual property (IP) licensed in 2004 will use externally developed IP, according to Jerry Worchel, senior analyst of In-Stat/MDR Digital Engines Service. This is motivated by the fact that 85% of all chips in today's consumer products require specialized functionality. Such products include digital cellular handsets, digital cameras, personal computers, video game devices, audio and graphics cards, and digital set-top boxes. Also, an industry forum (ESNUG) stated that Moore's law is accelerating faster than Gordon Moore's prediction. This rapid growth of chip complexity validates the importance of IP reuse and integration. So how can manufacturers manage all of the IP that goes into these systems?
Companies can no longer afford to produce all pieces of a system-on-a-chip (SoC) in-house. To be economically viable, building-block IP designed for reusability (that easily fits into the target SoC) is purchased, freeing the internal teams to design the product-differentiated IP. This IP requires standard user interfaces, complete documentation, and an IP verification environment with test/monitoring products. These test products thoroughly gauge IP functionality to ensure SoC verification on the interface with other blocks and higher-level functions. This certified and silicon-proven IP has a higher "confidence" rate, as opposed to IP created in-house, which lowers the risk of errors in the SoC.
How does one source a qualified IP provider? One industry resource, the Virtual Socket Interface Alliance (VSIA), is addressing this concern. Known as the SoC and IP standards body, the VSIA is redefining the way IP is qualified and implemented. With today's explosion of application convergence for consumer electronics, the VSIA is the industry's driving force behind SoC design and reuse. Over 100 worldwide members compose the VSIA, from leading semiconductor, IP, EDA, and system companies, chartered to develop and promote open standards for SoC design and implementation success. The VSIA has completed more than 24 technical documents. It also has formed business committees and adoption groups as well as alliances with other key industry organizations. These efforts aim to ensure that SoC specifications and standards represent the needs of the industry. Through a collaborative process, the technical documents have been developed to make the standards broadly accepted and adopted.
The most popular effort in the SoC industry has been the Quality IP (QIP) initiative, which establishes a metric for measuring IP attributes, for providing compliance data for easy integration, and for comparing IP across vendor sources. In addition, QIP rates IP cores and assesses the vendors' maturity and expertise, giving the manufacturer reliable data for determining successful IP integration. QIP is viewed as the industry's most comprehensive metric for IP quality and reuse.
Concurrent with QIP, the VSIA has established several development working groups (DWGs) focused on overall design reuse. Each DWG is chartered with creating specifications and documented requirements, industry standards, protocols, and measurements for IP reuse. The DWGs address the following areas: functional verification; hardware-dependent software; implementation (analog/mixed signal, digital design, signal integrity); IP property protection; platform-based design; VC (virtual component) transfer; and VC quality. For example, the VSIA recently announced the specification for functional verification for virtual component development and integration.
Currently, the VSIA is establishing appropriate adoption groups to ensure industry-wide adoption efforts, including application materials, reference designs, tools, and other support. The OCP-IP (Open Core Protocol-International Partnership) is the first of these adoption groups. A partnership between the Fabless Semiconductor Association and the VSIA on solutions for IP quality has formed a second group. As SoC design complexity continues, the VSIA will strive to support key industry standards and protocols that ensure successful IP integration.