Support Builds For Accellera's Unified Power Format Specification

Sept. 25, 2006

Two major EDA vendors have kicked in technology donations toward Accellera's efforts to create a standard for low-power design work.

David Maliniak

Two major EDA vendors have kicked in technology donations toward Accellera's efforts to create a standard for low-power design work. Accellera's Unified Power Format technical subcommittee has acknowledged donations from Magma Design Automation and Synopsys.

Magma's donation is of specifications that target requirements for logic synthesis, physical synthesis, library modeling, power analysis, special cells, design-for-test (DFT) technology, and automatic test-pattern generation (APTG).

For its part, Synopsys has donated power-management technology that includes power-management commands, SystemVerilog and VHDL constructs, and the Switching Activity Interchange Format (SAIF).

Under the Unified Power Format subcommittee's activities, the design community, EDA vendors, and Accellera are working together to produce an open and inclusive standard for low-power design by January of 2007.

Related Links Accellera
http://www.accellera.org/activities/upf

Magma Design Automation
http://www.magma-da.com

Synopsys
http://www.synopsys.com

About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.