Clock gating: Switching off the clock to flip-flops if the transition during clocking results in the same value. Dynamic Voltage Frequency Scaling (DVFS): Change both the voltage and frequency of a logical block during operation based
Clock gating: Switching off the clock to flip-flops if the transition
during clocking results in the same value.
Dynamic Voltage Frequency Scaling (DVFS): Change both the voltage
and frequency of a logical block during operation based on the task it performs
to produce a cubic power reduction.
Isolation cells: Prevent physical damage to sections of the IC that
interface to power switch-off modules.
Level shifters: Provide a proper interface for signals that cross
from one voltage to the other.
Multiple power domains: Use multiple voltages to implement a design,
and use lower voltage for noncritical blocks to save power.
Multiple VT optimization: Use two or more VT libraries to optimize
noncritical paths in a design to reduce leakage.
Operand isolation: Switching off the operand before the execution
starts if we know that the result will never get used in the next stage.
Pin swapping: Swapping a high-capacitance input with an equivalent
low-capacitance input for a high-toggle net.
Power switch-off: Turn off power to sections of the IC by using on-chip
switches formed using high-VT transistors.
Static Retention Power Gating (SRPG): Retain the state of
flip flop to enable fast bring-up of a logic module from power shutdown.
