Network 2402637 5f68e29932c45

How to Design SmartNICs Using FPGAs to Increase Server Compute Capacity

Sept. 22, 2020
SmartNICs boost server performance in cloud and private data centers by offloading network processing workloads from server CPUs. Learn how to design an FPGA based SmartNIC that accelerates network functions compared to software only based solutions.

A successful SmartNIC design must be able to implement complex data-plane functions including multiple match-action processing, tunnel termination and origination, traffic metering, and traffic shaping. A SmartNIC should also provide the host processor with per-flow statistics to inform network-tuning algorithms. In addition, the SmartNIC's high-speed data plane should be programmable through either downloadable updates or network programming to enable a flexible architecture that can easily adapt to changing data plane requirements. A successful SmartNIC design must work seamlessly with existing data-center ecosystems. Otherwise, the SmartNIC design is unlikely to succeed.

Sponsored

Compact buzzers, speakers, and microphones provide options for maximum flexibility

Same Sky Devices' diverse range of buzzers, speakers, and microphones are designed to minimize footprints and maximize reliability to address the trend of miniaturization. All...

MEMS Microphone Interfaces: Analog vs. Digital Outputs

The utilization of MEMS microphones presents an opportunity to incorporate sophisticated communication and monitoring capabilities into a wide range of devices.

Integrated Power Supply Buck Converters

Integrated power supply ICs to implement compact and efficient buck converters for factory automation, 5G and IoT.

MEMS versus ECM: Comparing Microphone Technologies

Two of the most commonly used technologies in microphone construction are micro-electro-mechanical system (MEMS) microphones and electret condenser microphones (ECM), with numerous...