Internal Oven Provides Voltage Reference Less Than 1-ppm/°C Drift
When precision voltage-reference requirements demand less than 1-ppm/°C temperature drift, the designer can choose to use expensive components (off-the-shelf modules) or build a custom oven enclosure. This second choice is common among cost-sensitive designs where a less-expensive IC reference (3 ppm/°C to 50 ppm/°C) is placed within a constant-temperature oven. The oven then is regulated to a fixed temperature, thus eliminating the reference output variation.
Appropriate thermal-insulation, mechanical fixturing, a heater, a temperature controller, and lots of pc-board area are involved in such an oven design. The circuit in Figure 1 accomplishes a sub-1-ppm/°C voltage reference without this list of hardware and bulkiness.
An LM2902 quad op amp is configured as a temperature controller to maintain the junction temperature of the voltage reference (IC1) at 75°C. IC1's external temperature can vary from 85°C to −40°C, a range of 125°C, yet IC1's internal temperature is 85°C to 65°C. The ratio of these two ranges produces a 6.25-times improvement in IC1's VREF temperature coefficient.
The oven in this application is at the die surface of the LM4130 voltage reference IC. IC1's No-Connect pins (1 and 3), which are used for factory adjustment, become part of the time-sliced temperature-control loop. No thermal insulation, mechanical fixturing, or heaters are required. In addition, all components are available in surface-mount technology, minimizing pc-board space requirements.
The heater internal to IC1's pin 3 is a reverse-biased ESD protection diode common to CMOS technology. The temperature sensor internal to IC1's pin 1 is a forward-biased ESD diode that has a VDIODE temperature coefficient of −2.1 mV/°C. The thermal insulation is maintained by the LM4130's plastic packaging. At first, this very small SOT23-5 package may seem to have insufficient thermal mass, something that traditional oven designs maximize. However, at the LM4130's die surface, microscopic spacings exist between the heater, the reference electronics, and the temperature sensor, dramatically reducing thermal-insulation requirements.
During the first time-slice (0.8 ms), a heat-pulse is applied to IC1 to maintain a die temperature of 75°C (Fig. 2). During the second slice (1 ms), IC1's surface restabilizes. Finally, during the third slice, IC1's VREF output is accurate and stable.
The temperature-regulator cycle starts before the first time-slice. When IC1's die temperature goes below 75°C, the sensor voltage at pin 1 will be more negative than −0.53 V, which causes IC2 to apply a 0.8-ms heat-pulse to pin 3 of IC1. The die temperature rises above 75°C and then begins cooling. After a 200-µs stabilization delay, the cycle repeats when pin 1 becomes more negative than −0.53 V. Thus, the regulator loop maintains pin 3 of IC1 at −0.53 V, which is the diode-equivalent voltage when the die junction is at 75°C. Heat pulses are 4.5 ms apart at −40°C, 6.5 ms at 25°C, 36 ms at 70 °C, and stop at 85°C.
The temperature controller is a frequency-modulated regulator. Its fixed pulse width (0.8 ms) applies a heater current source to pin 3 of IC1 when the temperature-dependent voltage at pin 1 senses less than a 75 °C die temperature. This sensor voltage level is biased by RN1C (100 µA).
IC2A, IC2B, RN1B, and RN2A are used to buffer, invert, and then amplify the sensor voltage to 2.5 V. This amplified sensor voltage is compared (IC2C) to the delayed (RN1D, C2) VREF voltage, which also is at 2.5 V. RN1D and C2 form a 200-µs blanking delay that prevents false triggering of the comparator before the die surface restabilizes after the heat pulse.
A low die temperature causes the output of IC2C to go high. This edge triggers the one-shot (formed by IC2D, Q1, C1, RN1A, and RN2D) to turn on Q2 for the 0.8-ms heat pulse. R3 and the on-resistance of Q2 set the heat-pulse current (325 mA). Z1 and RN2B level-shift the 12-V supply down to 4.2 V for IC1's VIN requirement (5.5 V to 2.7 V).
One may ask about the effect of temperature on the components in the controller loop itself. Must these components have a low temperature coefficient, and be well matched, to keep the die junction at 75°C? The answer is no—the temperature offsets and mismatches have a small effect (less than 10°C) on the operating point. Analysis using worst-case temperature errors on the offsets (30 µV/°C) and resistor matching (400 ppm/°C) result in a 6.25% (5°C) sensor voltage error.
One limitation of this application is that the reference voltage is only accurate during the non-heat-pulse period of the controller cycle. Thus, multiple VREF samples should be averaged between heat pulses for the highest accuracy.
Where synchronized sampling is impractical, interrupt the control loop with external electronics to prevent a heat pulse, then use VREF while the die cools. The die temperature gradient is −0.5°C/ms within the first 10 ms.
Another limitation is that the controller operating current is 30 mA at 25°C, 110 mA at −40°C, and 2 mA at 85°C. This can be excessive in battery applications. Again, external control of the heat pulse can reduce power consumption through time averaging. It's best to externally power-up the circuit only when VREF is needed. At −40°C (the worst-case external temp), the die junction will reach its temperature setpoint within 400 ms after power-up.
This application uses a heat pulse of 2 mJ. Though the voltage and current on pins 1 and 3 of IC1 are outside the LM4130 data-sheet absolute-maximum conditions, stress isn't excessive due to the pulsed operation. Greater energy can damage or degrade IC1. Ensure that the −5-V supply is on whenever the 12-V supply is on. With the −5-V supply off and the 12-V supply on, the controller loop applies the heat current continuously.