Designers employing high-performance analog-to-digital converters (ADCs) have a common problem: there are few, if any, amplifiers on the market that can provide the accuracy needed to buffer an input signal and drive a 16-bit ADC without a loss of performance. A 10-V full-scale ADC must be able to resolve 150 µV. This is a tall order, even when the input frequencies are as low as 100 kHz.
To compound the matter, many of today's ADCs have a full-scale range of 5 V. Any buffer used to drive such a device must contribute no more than 75 µV of error or the system performance will be compromised. This low-noise and low-distortion requirement ensures that a finite-bandwidth amplifier (e.g., fT = 30 MHz) is simply incapable of such performance.
Total error = root-sum-squared (noise, distortion, CMRR, gain error) < 75 µV
This device improves state-of-the-art circuitry by about 20 dB over currently available buffers (Fig. 1). Two amplifiers make up the system. The second amplifier is contained in the feedback loop of the first amplifier and configured for a gain of one.
Note that VOUT is approximately equal to VIN. The voltage at TP2 is similar to VIN as well. Consequently, the error be-tween the noninverting terminals and inverting terminals of the first amplifier is the same as the error between the noninverting and the inverting terminals of the second amplifier. Therefore:
VOUT = VIN + VERROR1 − VERROR2
or
VOUT = VIN
Figure 2 shows the performance of this circuit for a 0- to 2.5-V sinewave input at 10 kHz. When comparing the error (VOUT − VIN) in the bottom trace to that of the buffer alone (VOUT − VTP2) in the middle trace, a significant error reduction can be observed. Figure 3 shows a similar improvement for a ±10-V triangle waveform input at 1 kHz. The amplifier bandwidth was programmed to be 30 MHz.
