The Chronicles of GND (Part 3): Push Me, Pull Me—When Supply Currents Go Rogue
Last time, I teased you about the dark side of op-amp supply current, especially when we’re talking about negative supply pins and how the Single Supply Gang are going around connecting all those pins to GND. It’s time to dig deeper.
We’ll need some help from Herr Kirchhoff—but we’ll also need to bring him up-to-date. As it happens, Kirchhoff was born in the same year (1824) that Berzelius is credited with discovering the element silicon. He also died before anyone knew about energy levels, let alone semiconductors and op amps.
So let me introduce you to my take on “Kirchhoff’s Current Law As Applied To Op Amps.” That’s not a particularly memorable mouthful, though; you’ll have forgotten it by tomorrow. It needs to sound more like a spy movie. How about… The Kirchhopamp Protocol.
To derive The Kirchhopamp Protocol, I’ll make some simplifying assumptions. First, that the op amp’s input terminals play no part in our current discussions. Sure, a few stray electrons shuffle back and forth in the circuits we build, but they generally amount to picoamps or nanoamps of leakage, and that’s too small to worry about here.
Second, that there are no hidden batteries or other generators inside an op amp. Put another way, it cannot be a source of net energy in any circuit. We’ll ignore the fact that if the package were made from a material that’s transparent at some optical wavelength, then the pn junctions in the op-amp circuit could act as little photocells when light hits the chip. There’s more to say about how and when light can mess up semiconductor circuits, but that’s for another day.
So as far as we’re concerned for this discussion, then, our ideal Kirchhopamp has three terminals: positive supply, negative supply, and output. Or pin 7, pin 4, and pin 6, as we old guys call them, remembering those DIP8 days when op amps were big enough to see with the naked eye. I just designed in a new Maxim op amp that comes in a package that’s about 1 x 0.7 mm. About the same size as the grain of sand that, in our romantic imagination at least, the silicon wafer came from.
Revealing The Kirchhopamp Protocol
Here, then, is The Kirchhopamp Protocol in a nutshell: The sum of the currents flowing into the three terminals of a Kirchhopamp is always zero.
In equation format: Iplus + Iminus + Iout ≡ 0.
Now, just in case you’re about to reach for your trusty simulator to validate this claim, let me say just one thing: STOP. In the scary world of op-amp Spice models, the laws of thermodynamics, conservation of charge, and conservation of energy frequently do not apply. Op-amp models regularly contain non-physical voltage and current sources that can make external circuit currents appear and disappear in baffling ways. It shouldn’t surprise you to know that the biggest culprit is GND, which frequently turns up in the netlists of these op-amp models even though a real-world op amp doesn’t have a GND pin. Don’t even get me started about non-physical noise behavior…
Our equation is interesting both for what it tells you and for what it does not tell you. Let’s start with what it tells you: If there’s no load (i.e. Iout = 0), then in this quiescent condition:
Iminus(q) ≡ −Iplus(q)
In other words, the magnitudes are equal: |Iminus(q)| ≡ |Iplus(q)| = (ideally) the quiescent current consumption figure given in the amplifier’s datasheet. As an aside, Iplus(q) > 0 and Iminus(q) < 0 must be the case, at least in the long term, otherwise something is violating our no-internal-battery constraint. Hope that’s obvious.
Note that I snuck in an (ideally) there. I’m ignoring the actual output voltage of the op amp here because it should not make a difference. If you’re not taking any output current from a well-designed op amp, the current that it sucks from the power supply should not depend on what it’s doing.
Yet again, the behavior of some devices is a disappointment here. I’ve seen op amps whose supply current rises alarmingly when the amplifier’s output nears the supply voltage, even though the amplifier’s output stage isn’t doing any useful work. Just be alert to the fact that the quiescent current may not actually be independent of other circuit conditions. Oh, it’ll be temperature-dependent, too, for sure… but we’re deviating from my intended narrative.
Now let’s go back to the equation to see what it does not tell you: We don’t know anything about the value of either Iminus or Iplus when Iout <> 0. This is the complicated bit that makes The Kirchhopamp Protocol such an interesting adventure, not just a dry equation. But why is this?
The answer is to be found in the output-stage topology. Of course, an op amp has several other stages, but by and large these don’t take much current, and that current doesn’t depend much on external conditions. Nearly all the grief you’ll experience comes from that output stage. It’s where the rubber meets the Rload, as it were.
Note that here we’re talking about output stages that can both source and sink the output current; in other words, both Iout < 0 (i.e., is negative, meaning that it flows out of the pin) and Iout > 0 (it’s positive, flowing into the pin) are permitted. This is mandatory for any kind of general-purpose op amp.
Staging the Output Stage
There are quite a few potential output-stage topologies to consider. Each one presents a different challenge to the system and board designer. Getting useful bidirectional currents out of amplifier circuits has always been of great interest to audio engineers, so it’s no surprise that much of the material you’ll find out there on the interweb has a strong audio focus.
There’s not nearly enough space available here to descend either into the definitions of, or the relative merits of, so-called Class A, Class B, and Class AB output-stage forms. In essence, you need to know two things about an output stage to figure out what supply-current issues it will cause you.
First, look at the relationship between the expected output current and the output stage’s own quiescent current. Broadly speaking, if the output stage has a quiescent current significantly greater than the expected load current, it’s referred to as operating in Class A. If the maximum output-stage current (of either polarity) is much greater than the quiescent current, that indicates Class B operation. And Class AB fills in a rather poorly defined range between these extremes.
Second, are you dealing with a “push-pull” output stage or a single-ended one? This can actually be a little tricky to determine from a simplified schematic. The distinction is this: In a single-ended stage, only one of the transistors that connect the output pin to either the positive or the negative supply pins is actually controlled by the signal. The other one just sits there taking a fairly constant current. By contrast, in a push-pull circuit, both the “push” transistor (the one connected between the output pin and the positive supply) and the “pull” transistor (between output and the negative supply) can be controlled, so that the current in both is able to vary.
Let’s consider the difference in externally visible behavior between what I’ll call an ideal push-pull stage (audio guys call this a Class B output stage) and the two obvious variants of the single-ended output stage. The ideal class B push-pull stage can be thought of as a current-steering block. If Iout is negative (i.e., coming out of the pin), then Iout is drawn from the positive pin while the current in the negative supply pin is unchanged. In other words:
Iminus = Iminus(q)
Iplus = Iplus(q) – Iout (remember, Iout is negative so Iplus > Iplus(q))
Analogously, if Iout is positive (i.e., going into the pin, sorry to keep emphasizing this), then:
Iplus = Iplus(q)
Iminus = Iminus(q) – Iout
What happens if Iout is supposed to be a nice clean sinewave? It should be pretty clear (even without a diagram) that the current in the positive supply pin is the quiescent current plus the positive half-wave rectified bits of the sinewave. The negative supply current has the quiescent part plus the other, negative-going half-wave parts. So, both currents are horribly distorted.
If you’re trying to build a high-linearity circuit, well, would you want those nasty distortion components flowing in your ground plane and power traces? I thought not. But that’s often what will happen on your board if you let the Single Supply Gang connect the negative supply pin to GND even though it does have to be at that potential!
This is why some designers (especially ones fortunate enough to get to design their own op amps and amplifiers) like a single-ended output stage design. Here, there are two choices to make:
- Constant current on the positive side: Here the “upper” transistor to the positive supply pin just sits there, while the “lower” transistor to the negative supply does all of the varying. All changes in the output current are faithfully mirrored in the current emerging from that negative supply pin. Now, if that pin gets connected to GND, at least the current injected is undistorted. You might get crosstalk, but not additional system-level distortion. And the power supply gets an easy ride, because the current it must deliver does not vary with the signal.
- Constant current on the negative side: This is the other way round. Now all of the output current variation is cleanly sourced by the power supply connected to the positive supply pin, and there’s no variation in the current emerging from the negative supply pin. It’s therefore actually safe to connect the negative supply pin to GND without injecting any rubbish into that net.
Sadly, there’s still a catch, a trap that many designers fall into even if they have thought the output-stage issue through carefully. Can you spot what it might be? Hint: Think capacitors. As always, ping me at [email protected] with questions, comments, complaints, and (especially) with groundbreaking new circuit ideas (see what I did there?).
