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Measuring ADC Linearity from a Sine-Wave Input (.PDF Download)

Sept. 24, 2020

To obtain the transfer function of an analog-to-digital converter (ADC), it’s intuitive to feed a ramp signal and observe the ADC output code. But the greater the resolution and precision of the ADC, the more complex it becomes to generate the ramp signal.

For example, let’s consider an 18-bit, 1-Msample/s ADC, where the transfer function must be measured at 1 LSB/16 = 0.0625 LSB (for hits per code = 16) precision. This means that the ramp signal should be stepped at 0.0625LSB; thus, the resolution of the ramp-signal generator should be 22 bits. However, this is severely limited by the DAC chosen for the ramp generation. And when considering the DAC’s nonlinearity, this doesn’t seem like a practical solution.

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