Fast ADC Facilitates Direct RF Sampling at Higher Frequencies (.PDF Download)

The critical component in all digital communications receivers is the analog-to-digital converter (ADC).  The ADC sampling rate, bandwidth, and noise tolerance establishes the specifications and performance of the receiver. However, receiver architecture also plays a major role in its performance. An architecture that significantly improves performance over previous designs is direct RF sampling—and it’s become more practical than ever thanks to the availability of fast wideband ADCs.

Receiver Architecture Review

Perhaps the most widely used receiver architecture is the superheterodyne, where the received signal is downconverted to a lower intermediate frequency (IF) by a mixer before filtering and demodulation. In a typical arrangement (see the figure, a), the bandpass filter (BPF) narrows the bandwidth and the low noise amplifier (LNA) boosts the signal level. The local-oscillator (LO) frequency mixes with the incoming signal to produce a lower IF. The signal modulation, bandwidth, and data are retained. A demodulator recovers the original data.

One major disadvantage of the superhet is that it uses many circuits and filters, increasing the cost. In addition, the local oscillator (LO), often a PLL synthesizer, adds phase noise and jitter. Perhaps the biggest downside is that the mixing process generates images that can cause interference to the signals being received. Some designs are dual- or triple-conversion types, where two or three downconversions (or an upconversion in some cases) are used to provide image rejection.