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“Nano” NOR Flash Memory Fits in Tight Spaces

Feb. 27, 2023
The new family of small-form-factor NOR flash from Infineon supports up to 256 Mb of data and code storage.

Infineon Technologies has rolled out a family of NOR flash memory for wearables, wireless headphones, and other battery-powered, small-form-factor IoT devices in constant need of more memory in less space.

The semiconductor giant said the new family of NOR flash, called SEMPER Nano, has a unique combination of high-density, small-footprint, and power-saving features to help its customers upgrade IoT devices under the hood. The family, which brings 64 to 256 Mb of memory capacity to the table, contains configurable regions of flash memory so that code and data can be stored in a single 45-nm chip.

A modern smart watch is a feat of engineering. Today, these devices are equipped with everything from wireless connectivity (Wi-Fi, Bluetooth, GPS) and always-on graphical displays to suites of sensors that can continuously track the user’s health (via heart rate, blood oxygen, temperature sensors) and physical activity (via gyroscopes and accelerometers) in a form factor that can fit on a wrist. The design challenges stand out even more when it comes to wireless earphones and other in-ear gadgets that belong to the booming “hearables” category.

Cramming more features into every new generation of wearables—and the memory to support them all— while boosting battery life and remaining in the same form factor poses a serious challenge to engineers.

Low-Power Data Transfer

Based on the company’s proprietary two-bits-per-cell NOR flash and featuring a Cortex-M0 core, the new family of memory chips transfer up to 40 Mb/s via the quad-SPI bus. And for higher reliability, ECC is included in the mix.

With consumer- (0 to 70°C) and industrial-grade (−40 to 85°C) configurations, SEMPER Nano minimizes power consumption—typically, standby current is 5 μA and 1 μA when in deep power-down mode, while active read current is 30 mA.

To work new features into wireless headphones and other small-form-factor wearables, consumer electronics firms are opting to combine processor and memory die in a “system-in-package” (SiP) to save space and tamp down power usage. This contrasts with the “system-on-chip” (SoC) approach that’s the industry standard in mobile phones, where all of the device’s different components are united on a single slab of silicon.

Infineon said the SEMPER Nano NOR is shipping in a format called “known-good wafer” that’s compatible with these packages. Alternatively, the chips also can be housed in wafer-level chip-scale (WL-CSP) and ball-grid-array (BGA) packages.

The family is fully supported by the SEMPER Solutions Hub portal, which contains all of the resources required to integrate the SEMPER Nano into a product. The portal offers access to software development kits (SDKs) with production-grade drivers and application code examples; hardware kits for prototyping with microcontroller (MCU) boards from Infineon and third-party suppliers; and support for select integrated development environments (IDEs).

About the Author

James Morra | Senior Editor

James Morra is a senior editor for Electronic Design, covering the semiconductor industry and new technology trends, with a focus on power management. He also reports on the business behind electrical engineering, including the electronics supply chain. He joined Electronic Design in 2015 and is based in Chicago, Illinois.

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