SiPro PCI Express PHY IP Is Production Proven

Oct. 8, 2008
Designers now have access to silicon and volume production-proven 40-nm G PCI Express Gen1/Gen2 Physical Layer (PHY) intellectual property (IP). The SiPro PCI Express PHY product line is the first offering in Virage Logic’s advanced interface IP SiPro

Designers now have access to silicon and volume production-proven 40-nm G PCI Express Gen1/Gen2 Physical Layer (PHY) intellectual property (IP). The SiPro PCI Express PHY product line is the first offering in Virage Logic’s advanced interface IP SiPro product portfolio that is a result of its collaboration with AMD. This collaboration agreement grants Virage Logic the rights to license and modify certain AMD standards-based advanced interface IP that was designed for and used in its 40-nm ATI Radeon graphics products. The Virage Logic SiPro PCI Express Gen1/Gen2 PHY has been production proven in high-performance, low power, and high-volume implementations at the most advanced process nodes. It’s also silicon proven and optimized for mass production, rigorously verified, and characterized to reduce risk, improve time-to-market, and maximize yield. The Virage Logic SiPro PCI Express Gen1/Gen2 PHY is available for licensing on the industry’s leading commercial bulk 40-nm process node. VIRAGE LOGIC, Fremont, CA. (510) 360-8000.

Company: VIRAGE LOGIC

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