Chip Packaging Part 6 - Wafer to Panel Level Packaging

Feb. 4, 2021
Dr. Navid Asadi’s group delves into wafer scale and panel level chip packaging.

View the TechXchange: Chip Packaging table of contents

Dr. Navid Asadi’s group takes a look at wafer to panel level chip packaging. This is the six of a mutlipart series on chip packaging technologies.

About the Author

Navid Asadi | Assistant Professor

Navid Asadi is an assistant professor in the department of electrical and computer engineering at university of Florida. His research is mainly focused on physical inspection of electronics from device to system level. He investigates novel techniques for integrated circuits counterfeit detection/prevention, system and chip level reverse engineering, anti-reverse engineering, invasive and semi-invasive physical attacks, integrity analysis, etc. using advanced inspection methods including but not limited to 3D X-ray microscopy, Optical imaging, scanning electron microscopy (SEM), focused ion beams (FIBs), THz imaging, etc. in combination with image processing and machine learning algorithms to make the inspection process intelligent and independent from human. He has received several best paper awards and is the co-founder of IEEE-PAINE conference

About the Author

Alonso Conejos-Lopez | Undergraduate at the University of Florida

Alonso Conejos-Lopez is an undergraduate student at the University of Florida majoring in Electrical Engineering, with a minor in Sustainability and the Built Environment. He is working as a student researcher for the Florida Institute for Cyber Security, where he focuses on chip packaging security, with the aim to improve security measures and develop counterfeit detection methods for integrated circuit packaging. He has also been making a comprehensive series of instructive videos about the packaging industry, technology, and history.

About the Author

Peter Xi | Ph.D student at the University of Florida

Peter (Chengjie) Xi is currently a Ph.D. student at the University of Florida in the Electrical and Computer Engineering Department. He received an M.S. degree in Materials Science and Engineering from the University of Florida in 2020. His research is focused on developing counterfeit detection and prevention methods for integrated circuit packaging. He investigates various material characterization methods in combination with machine learning algorithms to generate unique fingerprints to make the characterization fast and independent from humans.        

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