Digital Diet Slims Your Power Designs

During the last 40 years, Moore’s Law has been the main driver for the power-supply industry. In 1965, Intel co-founder Gordon Moore noted that the power consumption of a chip doubles every 24 months. Later on, shifting into a higher gear, he accelerated his prediction to 18-month intervals. The demise of Moore’s law has been predicted for quite a while, due to the relentless addition of ever-smaller active devices, and the resulting leakage increase or “tunneling” through ever-thinner and narrower silicon insulation between the active devices on a chip. But recently, Intel, with its cleverness of replacing the silicon-dioxide isolation with the metallic alloy hafnium, dodged the demise of Moore’s law by another few years.

Like an enamored puppy, the power-supply industry has followed the Moore’s Law trend. Over the years, the industry has increased the power delivered by power supplies, while packing more circuits into their ever-decreasing physical size.

However, with efficiencies in the upper 90s, our industry also seems to be approaching a performance limit, and the end of further efficiency gains may be at hand. Frequent press releases laud every fraction-of-a-percent increase in efficiency as if this is the best that can be achieved. And, in all honesty, it probably is. We might approach the brass ring of 100% efficiency, but we’ll never quite reach the prize.

So, rather than continuing to ride the efficiency merry-go-round, let’s get off and explore other paths. And instead of concentrating all our efforts on stuffing more raw power into ever-smaller boxes, we need to put more brainpower into these already dense power supplies.

This shift is already happening gradually. From the introduction of simple on/off controls into board-mounted power supplies, we’ve progressed to overvoltage and overcurrent limiting, and remote output-voltage adjustments. However, these basic controls — tacked onto the proven analog circuitry on the board — started taking more and more space, reducing the overall power density of the supply.

Because this reduction in density occurred slowly, its effects were not initially noticeable. But eventually, the impact became apparent. This situation might be likened to a person who does not pay attention to what they eat and gradually adds inches to their waistline. The time for applying a “digital diet” to slim power-supply designs has arrived.

Such a diet consists of converting the fat analog signals to slim digital bits that can be easily digested by the predominant CMOS circuitry, and incorporate all the control, monitoring and management functions into slim silicon. A digital diet also will reduce and slim down the fat inductors and bulky capacitors needed in supplies using pure analog power conversion.

The arguments against converting to full digital power conversion echo the arguments against going on a food diet. One of the most common arguments is that we need to develop a common, uniform and proven digital power standard for all participants to follow. This would be nice, but as we wait for common agreement on the right diet to follow, our designs are getting fatter and fatter. We cannot wait any longer; the digital diet needs to be implemented today.

Some argue that digital conversion is too costly and that most of the functions can be achieved as well by using cheaper analog circuitry. Others indicate that digital conversion and control is too complicated to implement in power supplies. Other arguments against going on a digital diet range from the reluctance to use an unproven concept to the feeling that digital conversion and management is ineffective. There is also the basic denial of the need for digital control. Others simply take a wait-and-see attitude until it becomes an accepted technology by all.

Just as a regular diet offers the added benefits of better health, mobility and personal well being, a digital diet offers many secondary benefits beyond pc-board reduction and increased power density. For example, the number of components in a typical point-of-load distributed-power design can be reduced by a factor of 20, with the associated increase in system reliability. The number of pc-board traces, development time and the total system cost can be reduced as well.

Given all these advantages, don’t the arguments against going digital, sound more and more like the misgivings of an individual who continually puts off a needed diet, saying, “I’ll start it later”?

So power-supply designers, stop the excuses. Get your power designs in shape by putting them on a digital diet. When you take this step, you’ll produce products that are slimmer and smarter, and you’ll create them faster in the future.