GOEPEL Debuts FPGA JTAG I/O Modules

May 3, 2012. GOEPEL electronics has introduced ChipVORX Module, an FPGA based I/O module product line. The new modules are controlled via a standard TAP, enabling access to the entire ChipVORX ecosystem of test and programming IP for external instrumentation.

“Our ChipVORX technology has developed to the leading method in JTAG controlled FPGA embedded instrumentation within the last two years. With our new I/O modules users will be able to port highest flexibility and performance directly to external infrastructures,” said Thomas Wenzel, GOEPEL electronic’s managing director for the boundary scan division. “The dual usability of existing ChipVORX IP enables a complete synergy with embedded unit under test applications. Furthermore, existing systems can be simply extended organically.”

 The first ChipVORX module, named FXT-X90, is based on a Xilinx FPGA, providing 90 I/O channels, with 72 being voltage-programmable. Being equipped with a transparent TAP, the module enables the daisy-chained cascading of several boards of the same or different types. Various functions for universal frequency measurement, RAM test, fast flash programming, or control of customer-specific instruments are provided as ChipVORX IP. The module provides a separate clock generator. Another unique feature is that the ChipVORX IP blocks do not require specific design synthesis—that is, they are ideally suited for adaptive debugging.

In addition to FPGA embedded instrument utilization, FXT-X90 can be applied as a simple boundary scan I/O module with dynamic-mode switching capability.

The new hardware module is supported by all SCANFLEX boundary-scan controllers as well as GOEPEL electronic’s integrated software platform SYSTEM CASCON.

The user can integrate the ChipVORX Module FXT-X90 into a respective test object, automatically generate all required test and programming vectors, and if necessary interactively debug and visualize faults at pin and net level in the schematic.

The usage of the ChipVORX IP requires neither expert background knowledge nor specific FPGA tools or programmers. The ChipVORX I/O Module model line will be extended to additional Xilinx chips as well as further FPGA vendors.

www.goepel.com.

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