This year has been a significant one for ASSET InterTech. The company, founded in 1995 as a spinoff of Texas Instruments, initially focused on boundary scan. In 2007, it acquired Ireland-based International Test Technologies to add functional test capability. And in 2008, ASSET announced a major initiative to focus on embedded instrumentation.
In June of this year, ASSET announced that its ScanWorks platform fully supports Intel Silicon View Technology (Intel SVT), enabling the new validation, debug, and test capabilities that Intel is embedding into its processors and chipsets. Then in July, ASSET acquired Arium and announced that Arium’s software debug tools for Intel and ARM processors would be integrated into ASSET’s ScanWorks platform for debug, validation, and test.
In October, ASSET announced specific support, via the Arium SourcePoint debugger, for microserver designs based on the new Intel C2000 Atom SoC and for applications based on multicore Texas Instruments KeyStone II.
ASSET also has been working with the soon-to-be-ratified IEEE P1687 Internal JTAG (IJTAG) standard, balloting for which now is underway. At the International Test Conference in September, ASSET demonstrated full compatibility with the IJTAG standard for ASSET’s ScanWorks platform. ASSET also highlighted ScanWorks’ compatibility with EDA tools from Synopsys and Mentor Graphics and demonstrated how embedded IJTAG capabilities can be migrated from chip-level test processes and reused to perform board-level validation, test, and debug using ScanWorks.
Glenn Woppman, President and CEO of ASSET InterTech
ASSET president and CEO Glenn Woppman used an analogy to describe his company’s evolution. “We take a little page out of National Instruments’ playbook on virtual instruments,” he said. “Way back in the day, we were a boundary-scan company, and NI started with GPIB plug-in cards,” he said. “We both got started in a focused area and then expanded with the common premise of software—on our side, with ScanWorks driving embedded instruments, and on the NI side, with LabVIEW driving modular instruments.”
He emphasized, “Boundary scan was our jumping-off point, and it really laid the foundation.” Boundary scan, he continued, usually is used by the test side of the industry for interconnect test for shorts and opens and device programming. In addition, the JTAG port is used by the semiconductor industry or the software debug emulation part of the industry to access internal registers so a designer can see how his software is running.
“I think the JTAG port has supported the industry across the board quite well,” he said, because it serves as the main access mechanism into IP inside an integrated circuit.
Woppman said ASSET still invests in traditional boundary scan, but the technology is mature, and the investment is incremental. The opportunities lie in areas such as the Serdes and high-speed I/O work with Intel, the software debug capabilities of Arium, and IJTAG. “With the Arium acquisition, we are right there with BIOS and firmware debug and device driver debug,” he said. “And IJTAG gets us right into the SoC design,” enabling reuse of embedded instruments at the board level to help engineers get their designs up and running quickly—all the while addressing both hardware and software issues.
ASSET’s evolution has been driven by business challenges. “We had done a good job with boundary scan for customers,” Woppman said, “but we looked strategically at where we were and how we could leverage our core competencies and expertise to provide more value for customers and grow the business.” The ITT acquisition provided functional test capability, and the Arium acquisition this year added software expertise. Getting into the software area, he said, was a make vs. buy decision, and a decision to develop the capability from scratch would have required considerable catch-up. “Fortunately, he said, “I was able to get the Arium guys to see the vision and join with us.”
Woppman said that over the next few months the company will be investing in strengthening its ARM software debug and trace offering. The TI KeyStone announcement in October is one example of that investment paying off. ARM poses challenges, he said, because the many ARM licensees serve many different markets. Makers of low-cost devices with a “test-and-toss” strategy might not be amenable to ASSET’s solutions while manufacturers of large, expensive circuit boards would be.
Boundary scan, Woppman concluded, is a great technology, but it’s only a piece of the total solution for hardware and software design, validation, debug, and test problems. Acquisitions and internal development efforts have brought other pieces of the solution under one roof.