OPAL-RT Technologies supports FPGA motor simulation
May 12, 2014. OPAL-RT Technologies has created a suite of tools to make FPGA-based simulation accessible to engineers developing controllers for electric drives. A press release from PRNewswire points out that as new generations of EVs and HEVs continue to roll off assembly lines, OEMs are looking to extract every bit of efficiency out of the electric motors in their vehicles, while ensuring safe and reliable performance.
A critical part of achieving this objective is having an effective control unit for the motor drive. The control unit optimizes and maintains performance over a range of operating conditions and also compensates for nonlinear effects such as field saturation and high-order harmonics. Furthermore, the controller needs to operate safely in failure modes, for example, when there is a fault in the power electronics that drive the motor.
For the mechanical systems in vehicles, such as IC engines and transmissions, controllers are tested and validated using hardware-in-the-loop (HIL) simulation. HIL simulation connects the controller used in the vehicle with a simulated engine or transmission. This process enables the controller to be tested safely, quickly, and cost effectively, as a controller failure will only result in failure of the simulated engine or transmission. However, if the controller were tested in a lab with an actual engine or transmission, the engine or transmission could be damaged, and replacement is both expensive and time-consuming.
Mechanical systems typically have slower dynamics that can be simulated in real time using time steps of around 1 ms. However, electric motor drives are typically driven by switching pulses that occur at tens of kilohertz, and thus, real-time simulation of electric motor drives requires simulation time steps of the order of 1 µs. Achieving these time steps is not possible on commercial CPUs, so high-fidelity simulation of electric motors has to be done on FPGAs. FPGAs, however, are difficult to program because one has to deal with low-level considerations such as fixed-point scaling and timing synchronization during execution.
OPAL-RT's new suite of tools offers a set of real-time motor models, covering a range of motors used for automotive applications, including a permanent magnet synchronous motor (PMSM), switched reluctance motor (SRM), or brushless DC (BLDC) motor, has been prepackaged to run on FPGAs. The users do not need to know how to program an FPGA for simulation; they merely need to parameterize the motor appropriately using an intuitive GUI. The simulated motor inputs and outputs are converted to signals that can then be connected to the controller to complete the test setup. Next, the FPGA motor-test package enables the user to create power electronics faults to validate failure-mode operation of the controller. Third, the motor simulation can be integrated with a full-vehicle simulation running on a CPU for integration with other controllers, such as an ABS controller, that may need to be tested. Finally, OPAL-RT provides a test-automation package that allows the development of test scripts to run whole batches of test sequences, thus providing an efficient method of conducting exhaustive controller testing.