Rick Green 200

Automotive design example illustrates hierarchical DFT architecture

Nov. 6, 2017

Fort Worth, TX. Designs keep scaling and taking on a lot of complexity, according to Ron Press, technology enablement director at Mentor Graphics. Delivering a corporate presentation Wednesday on the International Test Conference exhibit floor, he recommended a hierarchical approach to design that employs a smart DFT methodology with a plug-and-play infrastructure with automation.

And at the 2nd IEEE International Workshop on Automotive Reliability & Test (ART17), held in conjunction with ITC, Tal Kogan of Intel on Friday described the application of a hierarchical DFT architecture to automotive designs.

Press in his exhibit-hall presentation commented that huge designs invite big issues, with potentially hundreds of DFT process steps. Without properly addressing DFT, he said, it can end up in a critical path in a design, putting the schedule at risk. Too frequently, he said, a last-minute DFT implementation can resemble a Rube Goldberg machine, adding needless complexity that perhaps won’t get the job done.

Press cited a hypothetical process step with a 90% success rate: string together 100 similar independent process steps and your complete success rate is 0.002%. “You need built in automation to get the DFT process steps to work,” he said.

He recommended IJTAG as a suitable plug-and-play infrastructure for DFT. IJTAG is the infrastructure used by Mentor’s Tessent tools. As a concluding call to action, he said, “Commit to a plug-and-play infrastructure…own your flow.”

At ART17, Kogan of Intel presented a paper titled “A Hierarchical DFT Architecture for Automotive Designs” with coauthors including Press of Mentor. DFT for automotive brings new challenges, Kogan said, including the need to monitor ICs during vehicle operation.

Kogan commented that a hierarchical approach allows a shift to the left of DFT implementation, with IJTAG and the separation of DFT and functional blocks offering benefits. He added that a hybrid solution involving embedded deterministic test (EDT) and LBIST can serve both high-volume manufacturing and in-system test, with IJTAG helping to simplify plug-and-play integration of the hierarchical implementation.

See related article “At ITC, Mentor to demonstrate Tessent MissionMode automotive IC in-system test.”

About the Author

Rick Nelson | Contributing Editor

Rick is currently Contributing Technical Editor. He was Executive Editor for EE in 2011-2018. Previously he served on several publications, including EDN and Vision Systems Design, and has received awards for signed editorials from the American Society of Business Publication Editors. He began as a design engineer at General Electric and Litton Industries and earned a BSEE degree from Penn State.

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