Keysight parametric tester reduces time-to-market, cost-of-test
Santa Rosa, CA. Keysight Technologies today announced the third generation of its P9000 Series massively parallel parametric test system. The system accelerates the fast ramp of new technology and reduces the cost-of-test in the development and manufacturing of advanced semiconductor logic and memory ICs. For example, with the new types of device structure and higher performance, the required amount of parametric test data per advanced technology node (less than or equal to 20 nm) is drastically increasing.
When the P9000 was introduced, it enabled 100-pin parallel measurements for multiple devices on silicon wafer by using a dedicated per-pin test unit module. The module had all the typical measurement functions required for parametric test (for example, voltage, current, capacitance, pulse, and frequency). In addition, direct charge measurement (DCM) technology enabled fast, 100-pin parallel capacitance measurements.
The second generation of the P9000 included the Keysight developed rapid Vt measurement technology. The rapid Vt measurement technology provided single measurements of threshold voltage (Vt) that were more than four times faster than any of the conventional test methods. In addition to 100-pin parallel measurement, faster single parameter measurements provided by the DCM and rapid Vt measurement technology enabled further improvements in test speed. Thus, advanced foundry and memory companies have adopted the P9000 platform (first and second generations) as their next-generation parametric test solution.
With the introduction of the third generation of P9000—with the new per-pin parametric test module, the Keysight P9015A—the tester has further shortened the time of capacitance measurements to address the trend of increasing test volumes of capacitance due to multilayer interconnection and new device structure. The new module enables the measurement of leaky capacitance by using its enhanced DCM technology and enables greater than two times faster single capacitance measurement with good data correlation for various type of capacitance (compared to conventional LCR meter). In addition, the 100-pin parallel capability of capacitance measurement allows customers to achieve further throughput improvement.
“Hundreds of the P9000 are already being used in R&D and in volume production by a number of semiconductor companies, such as advanced logic foundries and memory manufactures,” said Masaki Yamamoto, vice president and general manager of Keysight’s Wafer Test Solutions. “Keysight continues to enhance the P9000 to further reduce the customer’s time-to-market and reduce the cost-of-test. The third-generation P9000 provides the fastest parallel parametric test solution, with a 100-pin, ‘TRUE’ parametric per-pin module, even with the test structures used in conventional test systems.”