UPPER SADDLE RIVER, NJ—Pentek has introduced the newest member of the Jade" family of data converter XMC modules. The Model 71810 is based on the Xilinx Kintex Ultrascale FPGA and features LVDS digital I/O to meet custom requirements. The Model 71810 routes 38 pairs of LVDS connections from the FPGA to an 80-pin connector on the front panel. When mounted on a compatible single board computer or other XMC carrier, the Model 71810 provides a fully customizable I/O signal status and control interface.
"The Jade Model 71810 is a fundamental FPGA engine with a choice of FPGA resources to meet needs from low cost to high performance," said Robert Sgandurra, director of Product Management. "Pentek's modular approach to product design lets us quickly tune our products to our customer's needs." The Jade XMC line uses personality modules to enable customization of XMC front end functions to meet customer I/O needs.
The Model 71810 can be populated with a range of Kintex UltraScale FPGAs to match specific requirements of the processing task, spanning from the entry-level KU035 (with 1,700 DSP slices) to the high-performance KU115 (with 5,520 DSP slices). The KU115 is ideal for demanding modulation/demodulation, encoding/decoding, encryption/decryption, and channelization of the signals between transmission and reception. For applications not requiring large DSP resources or logic, a lower-cost FPGA can be installed.
The Model 71810 can be optionally configured with a P14 PMC connector with 24 pairs of LVDS connections to the FPGA for custom I/O to the carrier board or backplane. An additional option for a P16 XMC connector with an 8X gigabit link to the FPGA supports serial protocols.
With the Xilinx Kintex Ultrascale FPGA, LVDS digital I/O and gigabit serial I/O, the Model 71810 becomes an excellent high performance off-load co-processor to fit a wide assortment of processing needs in the most demanding of applications.
The Jade Architecture
The Pentek Jade architecture is based on the Xilinx Kintex UltraScale FPGA, which raises the digital signal processing (DSP) performance by over 50% with equally impressive reductions in cost, power dissipation and weight. Its PCI Gen.3 interface allows access to control and status registers for controlling algorithms, state machines and data flow across the LVDS I/O front panel and carrier board interfaces. A 5 GB bank of DDR4 SDRAM is available for additional functions. The factory-installed DMA controller can sustain 6.4 GB/s data transfers across PCIe.
Navigator Design Suite for Streamlined IP Development
Pentek's Navigator" Design Suite was designed from the ground up to work with Pentek's Jade architecture and Xilinx's Vivado Design Suite® providing an unparalleled plug-and-play solution to the complex task of IP and control software creation and compatibility. Graphical design entry for Xilinx and Pentek AXI4-compliant IP modules using the Xilinx IP Integrator greatly speeds development tasks. The Navigator Design Suite consists of two components: Navigator FDK (FPGA Design Kit) for integrating custom IP into Pentek sourced designs and Navigator BSP (Board Support Package) for creating host applications. Users can work efficiently at the API level for software development and with an intuitive graphical interface for IP design. The Navigator BSP is available for Windows and Linux operating systems.