Check out our Design Automation Conference 2023 coverage. This video is also part of the TechXchanges: Cybersecurity and Addressing Chip Verification Challenges.
Cycuity provides a design solution that uses information flow tracking to find bugs or security weaknesses as security assets flow in chip design in IP, subsystem, and block levels. Offering scalable, automated hardware security verification, it can detect security vulnerabilities during configuration and usage with Radix.
The platform provides a repeatable process for validating security properties and the absence of unexpected security flaws across the design lifecycle. When added to your existing verification environment, it covers from block level to full SoC, including software.
Radix systematically detects known and yet-to-be-discovered security vulnerabilities, including those using standards like MITRE Common Weakness Enumeration (CWE). It implements an asset-based methodology using a comprehensive security verification methodology centered around security assets.
Security rules are validated in any existing verification environment, enabling the automation of rigorous security verification throughout development, which can be reused across the design cycle and even across multiple design projects. Information flow analysis tracks and traces all security assets independently of their values, across the chip and through logical and sequential transformations.
Radix combines symbolic analysis with simulation and emulation, addressing the limitations of functional methods such as formal verification and SVA- and UVM-based simulation. Real-time analysis capabilities highlight the flow of security assets to understand and identify the root cause of uncovered vulnerabilities, with insight into flow hierarchy, data, and control values, as well as special features for inspecting memories.
