Whitepaper: AI Chip DFT Techniques for Aggressive Time-to-Market
May 30, 2019
To meet the growing compute requirements for artificial intelligence (AI) systems, semiconductor companies are racing to develop AI-specific chips, with time-to-market as a major concern. The Tessent family of products offers powerful design-for-test and silicon bring-up solutions aimed at aggressive time-to-market for AI chips. These DFT techniques are already in use at many leading semiconductor companies and have proven to achieve up to 10x faster ATPG with 2x pattern reduction and radically accelerate bring-up, debug, and characterization of AI chips.
