Cortex-A15 architecture
Cortex family tree
Cortex-A15 features
Arm's latest offering in the multimedia space is the new, high performance Cortex-A15. The Cortex-A15 architecture (Fig. 1) is designed to handle one to eight cores. The new architecture fits at the top end of Arm's processor spectrum (Fig. 2). The chip is targeted at a wide range of applications from smartphones to wireless gateways.
The 1 GHz to 2.5 GHz Cortex-A15 has many of the characteristics of the Cortex-A9 including the ARMv7-A Cortex core architecture and the 128-bit AMBA 4 Cache Coherent Interconnect (CCI). CCI supports AMBA 4 AXI Coherency Extensions (ACE) compliant ports delivering full coherency between cores. The system works with the ARM CoreLink network interconnect and memory controller IP (intellectual property). The chips target 28nm and 32nm foundries.
The Cortex-A15 feature set (Fig. 3) includes virtualization that is key to OS isolation and security needed on the latest smartphones. The cores' Long Physical Address Extensions (LPAE) supports a 40-bit virtual address space maps through a shared L2 cache with direct cache transfer support. It also allows privater peripheral support per core and include error correction support that is a requirement where reliability and large memories are concerned.
The instruction set includes the usual ARM ISA as well as Thumb-2 support. Arm's TrustZone security technology is part of the package. For number crunching the Corex-A15 support the third generation of Arm's Vector Floating Point (VFPv3) architecture as well as DSP and SIMD extensions and the NEON Advanced SIMD found in other Arm cores. Java acceleration is supported via Jazelle RCT (Runtime Compilation Target) that supports efficient ahead-of-time (AOT) and just-in-time (JIT) compilation. For debugging support, the Corex-A15 comes equipped with Arm's CoreSight Multicore Debug and Trace facility.
The Cortex-A15 will likely be tied to one of Arm's Mali media processor family. Mali supports 2D vector graphics via OpenVG 1.1 and 3D graphics via OpenGL ES 1.1 and 2.0. The Arm implementation is based on the Khronos Group standards. Mali includes features such as efficient alpha blending of multiple layers as well as an unlimited number of blended layers without additional bandwidth consumption. It also supports Full Scene Anti-Aliasing (FSAA) using rotated grid multi sampling.
As expected, Arm has a range of third party tool support in addition to its own ARM Development Studio 5 (DS-5). The DS-5 Debugger and new Streamline Performance Analyzer simplifies debugging and hot spot identification. The latter takes advantage of the on-chip trace facility. For initial development Arm is offering its Fast Models-based Versatile Reference Virtual Platform free for a 6 month evaluation.
