Fig 1. This version of the trigger circuit for the stop-motion camera system uses an electret microphone for a sonic input, but the designer can substitute an LED and photodiode pair to create an optical trigger.
Fig 2. Based on a quad op amp, the signal-conditioning portion of the trigger circuit outputs a suitable signal to the pulse-generation section.
Fig 3. The pulse-generation circuit uses two 555 timing circuits to create a square wave with a duty cycle controlled by variable resistor R28.
For a recent home-brew project, I built a stop-motion camera system using a timed flash and shutter system. The system required a trigger mechanism to set the timing in motion. The input trigger needed by the system controller is a pulse train of at least two pulses. After the system is “armed,” the first incoming pulse acts as a pre-trigger, and the second is the final trigger for the system. The circuit can use either an optical trigger (a “light curtain”) or a sonic trigger. With very minor modifications, it can work with both triggers. The parts are all through-hole components, chosen for availability.
The trigger circuit comprises five major components: the sensor, the conditioner, the pulse generator, the opto-isolator, and the power conditioner (Fig. 1). The power conditioner, which is not discussed in this article, supplies both positive and negative 9 V to all the circuitry on the board, using an LM317 and an LM337, respectively.
For several reasons, the trigger circuit uses an opto-isolated output. First, due to the sensitivities of the controller, I had to ensure that no ground loops were present. Previous tinkering had shown that they could cause random “firing” of the system controller. Second, the voltage levels (±9 V) used on this board aren’t compatible with the system controller circuitry (+5 V). Finally, the flash circuit (on another board) could potentially cause a large ground bounce (a 10-µs discharge of about 1200 V) that could damage circuitry elsewhere. Note that the opto-isolator base connection (pin 6) is left floating.
The trigger input is an electret microphone. The microphone has a four-terminal connector, two resistive +9-V pins, and two returns, but only two of these pins are used. You can substitute an LED and photodiode pair for the electrets. If so, one of the devices uses one pair of power/return pins, and the other device uses the other pair. In both cases, the sensor “hot” is tied to the resistive power output that comes back through the 22-µF capacitor. The capacitor blocks dc, allowing only the pulse from the photodiode or noise from the electret through to the signal-conditioning circuit.
The signal-conditioner circuit employs an OP-400, just because I had several on hand (Fig. 2). Any modern quad op-amp could be used. R12 is used primarily as a load/impedance matching device for the sensor. U2a is configured to deliver a variable voltage gain of from zero to about 20. U2b and U2c provide a gain of approximately 100 for U2a’s output. Once the circuit is built, you can adjust R7 to get the appropriate output at U2d. Obviously, differing amounts of gain were required for the optical and electret circuits.
R16, D1, and C3 form a pulse-shaping network that ensures that the output of U2d is a pulse or series of pulses. Finally, U2d provides a small amount of gain to the pulse and reverses its polarity to match the next stage of the system. This negative-going pulse is sent through C5 (Fig. 1, again) to the pulse-generation circuit. C5 blocks the dc voltage VPos (+9 V) from the output of U2d. R14 is a pull-up resistor that ensures the input to the pulse-generation circuit is correct. When all is working correctly, the input to the pulse-generation circuit is an active-low trigger. R17 was left unpopulated. It was originally unknown if it would be needed in real hardware, so the ability to install it was left in the printed-circuit board (PCB).
The pulse-generation circuit is simply two 555 timer devices, one fed into the other (Fig. 3). The first (U5) is set up as a “one shot.” That is, an input trigger causes a single positive pulse to come out of pin 3. The length of this pulse can be adjusted by changing R27 if necessary, but 10 kΩ was the choice in this case to provide an approximate 11-ms output pulse.
The second 555 (U6) is set up as an astable oscillator with a 50% duty cycle. When the reset is removed by the output of U5, this device begins outputting a square wave whose duty cycle is set by potentiometer R28. This is very convenient, as the time between rising edges can be precisely adjusted, creating a “time machine” of sorts.
Because the system controller looks for two rising edges to take the photo, changing this potentiometer can change the time at which the photo is taken, which is a very useful feature. The entire circuit is laid out on a two-sided PCB and fits (including connectors) in a small project box.
Anoop’s Analysis: Thumbs-Up With Caveats
by Anoop Hegde
While this circuit may work, part of it does not work the way it is described. Many design aspects also have been ignored, which will greatly reduce the reliability of the circuit. There are some design issues with the overall circuit and a few improvements could be added:
a. The three-stage dc-coupled amplifier provides a total gain of up to 2000 (Fig. 2). A small dc offset voltage at the input of the first amplifier (U2a) will be amplified by up to 2000, which may saturate U2b or U2c and render the circuit unusable. This can be avoided either by using ac coupling between U2a-U2b, U2b-U2c, or by using op amps that have offset nulling inputs.
b. The circuit uses C5 for ac coupling between the signal-conditioner and pulse-generator stages. When the output of the conditioner stage switches from negative to positive, voltage at the input of pulse generator can go as high as 1.5 VPos. Similarly, during positive-to-negative swings it can go as low as 1.5 VNeg. This happens because the output of C5 is biased at VPos/2. Voltage swings higher (or lower) than the supply voltage of these ICs can damage the IC’s input section. This can be avoided by adding a switching diode from the common point to VPos and another diode from the common point to ground to clamp maximum voltages to VPos + Vf_diode or VGround – Vf_diode.
c. C3 and C5 must be non-polarized (that is, ceramic or film, not electrolytic) to handle positive and negative voltage swings, but 22-µF caps with 25-V ratings are somewhat expensive. At audio frequencies, a 22-µF cap presents an impedance of 70 Ω (at 100 Hz). This impedance is still very small compared to the input impedance of the following stages, so the capacitor can be reduced to a much smaller value and the circuit will still work.
d. No reason is given for using bipolar power supplies for the op amps. If there is no good reason, the bipolar supply is just an unnecessary complexity that can be avoided. A single positive supply could be used, with the non-inverting input of the op amps biased at VPos/2 and used as single-supply op amps.
e. The output of amplifier U2c goes to diode D1 through a 10-Ω resistor, which then ends up charging 1-µF capacitor C3. This presents a very low load impedance to U2c when the capacitor is in a discharged state—not a good thing to do to an op amp.
f. D1 is specified as a 1N4001, a power diode that has a large reverse leakage current. It would be better to use a small-signal switching diode like a 1N914 or 1N4148 to keep reverse leakage current small, or else C3 may partially discharge through D1 when U2c’s output is negative (or zero) and affect the timing of the circuit.
g. The charging time for C3 (through R16) is about 10 µs, and the discharge time (through R17/R10) is about 11 µs. This must be kept in mind while determining re-triggering timing (if quick re-triggering is required).
h. The author assumes that U2d acts as a comparator and outputs a train of pulses. However, U2d is configured as an inverting amplifier with a gain of 10. As the positive output of U2c charges C3 through R16 and D1, the voltage across C3 will slowly rise and the output of U2d will slowly fall, matching the rise of the input voltage. To get an output pulse, U2d must be connected as a voltage comparator, not as an amplifier.
i. In the pulse-generator circuit, timing capacitor C10 connects directly to the discharge pin (pin 7) of U5, which is an open-collector output. When the timer starts discharging, it has to pass a high-current pulse from C10 through the internal discharge transistor because there is no resistor to limit current from C10. The discharge current is limited only by the capacitor’s equivalent series resistance (in the order of milliohms) and the internal resistance of the discharge transistor. It is always a good practice to add a current-limiting resistor in series with the discharge terminal of a 555 timer, especially when using large timing caps like 1 µF. Otherwise the discharge transistor will eventually burn out.
j. The author states that U5 will output an 11-ms pulse with an R27 of 10 kΩ. However, the timer produces a pulse of about 100 ms with a 10-kΩ charging resistor and 1-µF capacitor (C10).
k. R17 (Fig. 1) can’t be left unpopulated. C5 charges through R17 and discharges through R14. Without R17, C5 will charge only when the output of the conditioner is lower than VPos, and once it charges, it cannot discharge (and charge in the opposite direction) when the output of the conditioner goes high. This will effectively open-circuit C5 for subsequent pulses.
The Author Replies
a. This was a consideration in the original design of the circuit. The parts used were ones I had on hand (OP-400s) and were all from the same lot code, so I designed around those. This device, while not new, is specified to have a less than a 150-µV offset (across the full Mil-Spec temp range). So even at a full gain of 2000, I was not concerned, as the final offset would be less than 240 mV. The output is also dc coupled. The actual output offset was measured at less than 20 mV.
b. This is a good point about dropping in a Schottkey or similar diode to protect the input stages. The divider was left in the circuit schematic, but if I recall correctly, I removed the pull-down half of the divider in the final implementation. I had put the divider in as a way to let me change the circuit should I need it. Still, good catch on the protection diode.
c. The frequencies are “audio” in the broadest sense. The source I was detecting actually had a primary frequency of about 15 kHz. It was a metal-on-metal collision, and I wanted to be sure to catch it. You are correct that I could likely have used a much smaller value, but the price of the caps, in the scheme of the overall project (which was considerably more than this circuit) was relatively small. In the end, I used 10-µF capacitors, as my kids got into my lab and lost the 22-µF parts for me. You are correct to point out that they need to be non-electrolytic.
d. Regarding the bipolar power supplies, the feeder power supply for this circuit was one I had previously built, ±12 V. As noted, the op amps were chosen because I had them on hand. They are not rail-to-rail, and they use a fair amount of overhead (about 2 to 3 V). Using a single supply would have required more complexity at the input of the op amps to center-bias the input signal range (likely just a resistive divider), and that would be subject to tolerances that would become apparent with regard to item a, above. Also, I would be able to get an output range of only about 3 to 5 V, and this would not ensure that the 555s would trigger, even with the capacitive coupling between the stages.
e. Generally speaking, you’re correct. Driving high capacitance with an op amp can overdrive the amp or lead to oscillations. OP-400s are robust in this respect, though. They can tolerate short-circuited outputs indefinitely and are reasonably unity-gain stable. The small resistance was primarily to ensure as sharp an edge as I could attain given the device characteristics I had. You are right that I could have used a smaller capacitor, and maybe should have. It’s amazing how the parts you have on hand can drive the final design of your circuit.
f. Again, I used what I had on hand, a 1N4001. It was a “living option.”
g. Exactly correct on the trigger timing. In my case it’s generally minutes between triggers, so it’s not an issue. Good thing to keep in mind for expansion of the project, though.
h. Not at all correct. I do not assume it will act as a comparator. I expect it to act exactly as you described. The purpose of this amplifier is to ensure that the final output pulse is of the correct polarity and amplitude, depending on the input signal used. In the optic case, the input is positive, with a negative-going input. In the case of the sonic trigger, it is 0 V with a positive-going input. In the optic case, this amplifier is bypassed to get the pulse polarity correct going into the next stage. This allows the same PCB to be used for multiple inputs.
i. This may be a fair assessment, but I don’t know. The circuit used is directly from the datasheet for monostable (1-shot) operation. I rarely use 1-shot mode, so it is entirely likely you are correct. I have (quite naively) assumed that the datasheet schematics would not set up the device in a manner that would overstress it.
j. The 555 datasheet (Fig. 3 nomograph) and oscilloscope measurements say otherwise, but I can believe that you might have tracked the wrong line, especially if your eyes are getting as bad as mine. C10 is 1 µF (C in the datasheet), and RA + RB = 10 kΩ. The datasheet says this should be a little less than 10 ms. The scope put it at about 11 ms. But, hey, what’s an order of magnitude between friends?
k. Incorrect. C5 is used as a dc blocking capacitor, and as such it allows ac waveforms to pass through. The pull-up ensures the proper input polarity for the monostable 555 (U5): a negative-going pulse between 0 and 5 V. In the realized circuit, the pull-down was removed.