Ethernet in the Age of AI

Jan. 23, 2025
Check out the presentations from the 2024 Technology Exploration Forum.

The Technology Exploration Forum (TEF) 2024 was held in Beaverton, Ore., this past September. In case you missed it, peruse the video presentations on YouTube

You can start with John D'Ambrosia, Chair of the IEEE P802.3dj Task Force and TEF event chair, as he discusses how Ethernet's growth supports the artificial-intelligence (AI) ecosystem. There are more than a dozen video presentations on topics ranging from Ethernet and high-performance computing (HPC) to the challenges of 400G Ethernet. 

I picked a few of my favorites and included them here. Ethernet remains the main networking system for embedded and data-center environments. It's amazing that a low-power microcontroller can use a low-speed connection to link to the cloud where 400G Ethernet is king. 

Small Form Factors for High-Speed Ethernet

Thomas Palkert, System Architect at Samtec, talks about standards from the small form factor group of SNEA, including challenges of density, power, and cost for Ethernet in AI applications. He highlights the need for faster speeds while achieving higher density, lower power consumption, and reduced costs in a compact form factor.

Optimizing Networking for AI Scale and Performance

Christopher Blackburn, System Architect & Director of Field Applications Engineering at Astera Labs, addresses challenges when dealing with communication in AI networks. This includes discussion of the diverse requirements for different network types. He takes a look at the need for optimization. 

Achieving 400G Ethernet: Industry Challenges in the AI Era

Nathan Tracy is a Technologist with TE Connectivity, a maker of all sorts of connectors including high-speed Ethernet. He's also President of the Optical Internetworking Forum (OIF). In this presentation, he talks about the "industry efforts to achieve 400-Gb/s Ethernet for AI applications at the Ethernet Alliance's Technology Exploration Forum. He highlights OIF's 448-Gb/s project, which aims to address challenges and unify the industry."

Ethernet's AI Era: Navigating 400G Per Lane Challenges

Ethernet Alliance Events and Conferences Chair, David J. Rodgers, talks about 400G Ethernet. He's also the Technical Business Development Manager at EXFO, a company that develops test, monitoring, and analytics solutions for the global communications industry. 

In this presentation, David "explores the complexities and opportunities of Ethernet in the AI era, focusing on the challenges of achieving 400 Gigabit Ethernet per lane. He discusses the potential need for specialized testing and emphasizes the importance of collaboration within the industry to overcome these hurdles."

John D'Ambrosia, Chair of the IEEE P802.3dj Task Force and TEF event chair, discusses how Ethernet's growth supports the AI ecosystem. He introduces the two-day Technology Exploration Forum covering issues impacting faster data rates, focusing on 200-Gb/s signaling to enable higher-speed Ethernet connections up to 1.6 Tb/s.

The Ethernet Alliance held its Technology Exploration Forum (TEF) exploring Ethernet in the Age of AI in Santa Clara, Calif., on October 22-23, 2024. The NextGenInfra.io team was on the ground to capture thought leader perspectives on changes and evolution needed in Ethernet to support AI/ML workloads — both on the front-end and back-end (scale out).

Subscribe to the Ethernet Alliance newsletter to stay up-to-date on future events and resources supporting the continued success and global expansion of Ethernet technologies.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.  

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