SPI Design Takes An Integrated Approach
Communications IC company Integrated Device Technology (IDT) has expanded its portfolio of flow-control management (FCM) products with a family of packet-exchange devices. The new family includes the IDT88P8344, which the company claims is the industry's first system packet interface (SPI) exchange product that integrates switching, aggregation and rate adaptation of four lower rate SPI-3 interfaces to the higher rate SPI-4 interface in VPN firewall cards, Ethernet transport and multi-service switches. Additionally, the logical port-mapping feature of the device creates channelled data paths between network hardware elements such as network processor units (NPUs), traffic managers, multi-gigabit framers and physical interfaces (PHYs), and switch fabric interface devices.
The SPI-3 to SPI-4 exchange product is compliant with industry standard interface specifications and includes enhancements such as programmable SPI-3 pause insertion and additional features that ease system design.
The IDT88P8344 SPI-3 to SPI-4 exchange device uses a backpressure scheme that tolerates a large range of logical port data rates. In general, a lower logical port data rate results in the creation of more, shorter bursts in the transfers. In addition, SPI-3 ingress, SPI-3 egress and SPI-4 interfaces are often configured such that they support different backpressure schemes.
In the IDT device, these different backpressure schemes are accommodated using large but efficient buffers created from segmented memory, resulting in faster response times and lower internal latency while affording absorption of large external delays caused by data and flow control pipelines in adjacent devices such as packet-forwarding engines and PHY devices.
The buffering capabilities are used to absorb network delays and prevent loss of information that might occur as a result of flow control response times. This backpressure scheme also helps to prevent congestion and starvation at points in the data path, resulting in a consistently managed flow of data.
In addition, the IDT88P8344 SPI-3 to SPI-4 device offers a patent-pending technology that contains an apparatus and method for transferring data that comprises a high proportion of short bursts. In this method, data is received on a burst-by-burst basis. Once a burst is received, it is stored in a processing queue. Complete bursts continue to be received, so long as a processing queue can accommodate a data burst. The complete data burst is then directed to an output and used to transmit a complete data burst to a ready target port. This accommodates and converts burst size and other burst transfer parameters between separate SPI interfaces, as specified in the SPI standards.
'IDT is once again leveraging its knowledge of communications systems to develop specialized devices that accelerate packet processing by enabling the interworking of devices with SPI-3 and SPI-4 interfaces,' said Thomas Brenner, vice president and general manager of the IDT flow-control management division. 'Much like the company's existing flow-control management devices, the IDT packet-exchange products will allow our customers to benefit from the integration of critical functions that will enable them to effectively solve data-flow-control issues in their equipment designs as they move to industry-standard protocols.'
'With this new single chip packet-exchange device, IDT has solved the problem of providing backpressure simultaneously to separate data paths having diverse traffic characteristics,' said Jeremy Bicknell, packet exchange product manager for the flow-control management division at IDT. 'At the same time, the IDT packet-exchange devices absorb delays commonly found within networking sub-systems without the need for other expensive, performance limiting multi-chip solutions.'
