Power Reduction: Another Benefit of Signal Integrity

July 11, 2005
Signal transmission speeds are now entering the gigahertz range and understandably, considerable attention is now being paid to signal integrity. The primary objective of most research is to extract the dormant power of semiconductors...

Signal transmission speeds are now entering the gigahertz range and understandably, considerable attention is now being paid to signal integrity. The primary objective of most research is to extract the dormant power of semiconductors. For example, while current processors operate at nearly 4 GHz, unfortunately PCB performance is nominally limited to 800 MHz. Those limits are set by a combination of design and manufacturing issues. Addressing this issue is a complex challenge, especially when the demands of cost and performance collide. This challenge will likely loom larger as the electronics industry moves forward and, increasingly, signal integrity will reside at the heart of potential solutions.

The most intimidating signal integrity challenge is manufacturing. The reasons are manifold. For example, the natural variation of traditional manufacturing and assembly processes is a formidable foe. Even very small variations in material properties and dimensions or of circuit features can degrade a signal. So signal integrity will be increasingly important, but what is it really?

Perhaps signal integrity can be most easily summarized as the ease or degree to which a transmitted digital signal can be deciphered as to whether it represented a 1 or a 0 when sent—a simple definition but not a simple task. Ascertaining signal integrity using current design and manufacture methods often requires a skilled engineer and exotic software. The problem lies with the fact that circuit materials, design approaches, and manufacturing processes are far from ideal for high speed. For example, competition for routing channels on PCBs having many signals of various strengths and proximity traveling through them translates to lots of coupling and that creates noise and degrades signal integrity.

Solve the noise problem and there are still a host of other gremlins in the system. For example, there are a range of manufacturing artifacts to deal with, including inconsistencies in dielectric properties and trace width, variation in circuit spacing, even copper roughening treatments, which impact signal integrity often in only a minor way. The additive effect of these once minor issues will, at higher speeds, adversely affect signal integrity by introducing changes in impedance and capacitance. Moreover, long time design and material concerns of resistance, dielectric loss, conductor loss, signal skew, and more recently the electronic stubs associated with plated vias, all take a toll, making it difficult to predict and design for reliable performance.

One path through the maze is to segregate the high-speed interconnections from the low-speed power and ground, routing them separately in materials that can be more easily controlled, like microstrip cables. These can then be routed from the top of one package to the top of another. No special skills are required to analyze the signal because simple and ubiquitous tools easily predict the results. It's a very compelling idea that cuts to the heart of the signal integrity challenge. Moreover, it has already been demonstrated in the laboratory. The lab prototype provided sufficient signal integrity to transmit a signal nearly 3X the manufacturers specified distance, through two connectors, with a 60% margin.

The surprise, however, was doing so using less than 2% of the anticipated power. With the growing concern over energy use, this largely unexpressed benefit of signal integrity seems too compelling to ignore. Power reduction is a far-reaching benefit that every product can enjoy, from handheld devices to supercomputers. A clean, well-designed signal channel even allows for the reconsideration of how ICs are designed because the I/O driver complexity can be reduced. Additional power savings are anticipated here as well, because with lower I/O voltage comes lower core voltage and power also.

In summary, the power-reduction potential of improved signal integrity may well see increased investigation as a partial solution to the energy challenge. Moreover, in a time when a many electronic product developers are struggling to get the heat out of the system, one might ask: Why generate the heat if it can be avoided?

About the Author

Joseph Fjelstad | CTO, The Occam Group

Occam inventor Joseph Fjelstad has been active in electronics manufacturing since 1972 in various roles, including chemist, process engineer, and R&D manager. He holds nearly 190 U.S. Patents and numerous patents outside the U.S. He’s an internationally recognized expert, inventor, and lecturer in the field of electronics interconnection technology and a veteran of several startup companies, including Beta Phase, ELF Technologies, MetaRAM, Silicon Pipe, and Tessera (now the public company Xperi).

Some of Fjelstads innovative devices and novel reliability-improving IC packaging structural features are found in nearly every electronic device made today. He’s also an author, co-author, or editor of several books on interconnection technology, including Flexible Circuit Technology 4th Edition, the most widely distributed reference book on the topic, Chip Scale Packaging for Modern Electronics, and Solderless Assembly For Electronics — The SAFE Approach (the Occam Process). In addition, Fjelstad has written hundreds of articles, columns, and commentaries for various industry magazines and journals over the last five decades.

Joe is cited over 10,000 times on Google Scholar.

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