I’ll be hosting two panel sessions again at the 2025 Chiplet Summit at the Santa Clara Convention Center on January 21st through the 23rd. You can register now. Access to the exhibits is free if you register online but the conference sessions will be the more interesting aspect of the summit.
I am hosting the Superpanel talking about chiplets and Chiplets in 2030. You can check out the Superpanel and Chiplets in 2029 from last year’s summit. Some of the topics of discussion will be about chiplets and artificial intelligence (AU) and the Universal Chiplet Interconnect Express (UCIe).
UCIe has progressed significantly since it has been demonstrated in 2024 (Fig. 1). Cadence’s demonstration used UCIe to connect chiplets in distances ranging from 5 mm to 25 mm.
1. Cadence has shown off chiplet prototypes using the Universal Chiplet Interconnect Express (UCIe) standard.
Chiplets have gone mainstream. I’ll have more on this once the Consumer Electronics Show rolls around as there are some embargoed announcements on chips the use chiplets to add neural processing units (NPU) and GPUs to the mix.
I look forward to seeing some of you there.