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Tools Debug ARM Code In KeyStone Architecture

Oct. 3, 2013
A new weapon for debugging applications based on processors employing Texas Instruments’ multicore KeyStone II architecture comes in the form of ASSET InterTech’s Arium SourcePoint debugger toolset for ARM.

A new weapon for debugging applications based on processors employing Texas Instruments’ multicore KeyStone II architecture comes in the form of ASSET InterTech’s Arium SourcePoint debugger toolset for ARM. Two ASSET Arium run-control probes support the debugger. The cost-effective LC-500S probe debugs ARM code. SourcePoint on the probe supports TI’s Embedded Trace Buffer and exploits ARM’s Program Trace Macrocell (PTM) and System Trace Macrocell (STM) capabilities. It offers post-capture analytics, results graphing, and search functionality. The LTX-1000 Trace Port Analyzer supports 2-Gbyte external storage for trace results. Engineers can examine trace results stored in the LX-1000 to identify the precise location of the cause of a bug. Post-processing capabilities (e.g., statistical tabulation) are synchronized with SourcePoint’s line-by-line code display of trace results.

ASSET INTERTECH

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