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Processors

AI-Enabled RISC-V Cores Target ASIL B Automotive Apps

The MIPS P8700 RISC-V core, which implements a RISC-V ISA, aims at ASIL B and ISO 26262 functional safety.
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Security risks with DRAM
Memory

Understanding Memory’s RowHammer Challenge

The DRAM industry has long been plagued by the security risk of RowHammering, and mitigation techniques have done little to stop attackers. But a new approach to remapping DRAM...
RISC-V Summit
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Processors

Highlights from the RISC-V Summit 2024

Check out some of the video presentations from this year's RISC-V Summit.
Lattice Semiconductor
Functional safety for ADAS
FPGA

Programmable Protection: How FPGAs are Shaping the Future of Automotive Safety

As the automotive industry evolves to keep pace with the latest technological advances, FPGAs enter the fray as key players in functional safety.
What’s the Difference Between Serial NAND and NOR Flash?
Memory

What’s the Difference Between Serial NAND and NOR Flash?

Winbond’s QspiNAND brings NAND flash memory to serial storage applications.
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TechXchange

CXL for Memory and More

Check our more Compute Express Link (CXL) articles and videos.
Intel
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TechXchange

Insights into RISC-V Adoption and Support

This TechXchange examines the adoption and industry support of the RISC-V architecture
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TechXchange

Trends and Insights About RISC-V

Take a look at why RISC-V is important in embedded design.
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TechXchange

Examining the RISC-V Architecture

This TechXchange delves into the architecture and design aspect of RISC-V