Data Soars At 20 Gbits/s With Ethernet-Optimized Network Processor

Dec. 8, 2004

It's not a spaceship. But Xelerated's X11 network processor lets Ethernet-based data take flight, traveling at up to 20 Gbits/s full duplex. The processor also enables Sonet/SDH data transfers at 10 Gbits/s full duplex. The...

Dave Bursky

The company's designers integrated 24 Fast Ethernet/Gigabit media access controllers (MACs) and four 10-Gbit/s Ethernet MACs, as well as user-selectable SPI4, XAUI, or SGMII traffic interfaces, on this single chip. The X11 also possesses TCAM, RLDRAM, FCRAM, and SRAM user-selectable table memory interfaces.

Based on a programmable data-flow pipeline, the X11 can do more lookups per packet and provide more lookup bandwidth than other network processors. The architecture doesn't use the arrival of instructions to prompt the fetching of data. Instead, it utilizes the arrival of data to prompt the fetching of instructions. As a result, networking-system performance is enhanced.

The chip was designed with IPv6's wider addresses in mind, so it can handle wider TCAM and programmable algorithmic searches. Embedded buffer management and a multicast copying capability enable TM-less enterprise systems. MAC and flow-learning/aging functions included in the hardware simplify system design.

The X11 targets 5-, 10-, and 20-Gbit/s Ethernet applications and 5- and 10-Gbit/s Sonet applications. It effectively replaces the company's previous X10q-e NPU. Other Xelerated products, such as the X10q-m, are good fits for 20-Gbit/s Ethernet over Sonet and multiprotocol label switching/Sonet. The X10q-w targets 20-Gbit/s packet-over-Sonet.

Housed in a 1428-contact package, the X11 only uses 867 pins for signaling and control. The remaining pins are power and ground connections. In lots of 10,000, the processor is priced at $395 each.

Xelerated Inc.
www.xelerated.com

About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.