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Low Power FPGA Targets Wearable Applications

Feb. 20, 2015
Lattice Semiconductor's new iCE40 UltraLite targets mobile devices like wearable technology where low power is king.

Lattice Semiconductor's new, 40-nm iCE40 UltraLite targets mobile devices like wearable technology where low power is king. The iCE40 UltraLite uses half the power and is less than half the size of the iCE40 Ultra (see the figure). The iCE40 Ultra (see “Customizable FPGAs Consume 75% Less Power”) is available with more LUTs (look-up tables) and is designed for higher end applications. 

The iCE40 UltraLite uses on-board flash configuration memory. It has up to 26 I/O pins. Three can sink 24 mA, one handles 100 mA and one can handle up to 400 mA. The latter is often used for a white LED to provide a camera flash. These high current pins eliminate the need for off-chip drivers and resistors. Off-chip drivers could consume as much space as the FPGA given is small size.

1. The iCE40 UltraLite uses half the power and is less than half the size of the iCE40 Ultra.

The chips have up to 1248 LUTs and 56 Kbits of embedded block RAM with a range of hard peripherals that do not use up LUTs. These include four 16 by 16 multipliers with 32-bit accumulators, a pair of I2C interfaces, and an SPI interface. There is a 10 kHz low-power oscillator and a high performance 48 MHz oscillator.

The iCE40 UltraLite is available in a 16-ball WLCSP that is only 1.4- by 1.4- by 0.45-mm. Static power requirements are only 35 µA. Pricing starts at $0.40. 

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William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

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