Crossbar’s resistive RAM (RRAM) joins magnetic and phase-change non-volatile memory technologies that are competing against the entrenched flash storage market. It will have lots of competition, but RRAM’s features may put it ahead of the pack.
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RRAM cells are easy to build using conventional CMOS processes. It also scales well, making it an interesting match to microcontroller and microprocessor on-chip system-on-chip (SoC) memory. Not all non-volatile storage technologies work well in this environment, and often designers stick to larger, less dense geometries to deliver the necessary cost and reliability characteristics for a product. Memories with greater densities are desirable, but the cost of using these other approaches rises significantly.
The three-layer cell using current technology is 6 nm wide (see the figure). Add 2-nm separation between cells for a 10-nm cell spacing. The switching medium in the cell is amorphous silicon with tiny metal filaments. Metal ions migrate from one end of the filament to the other to change the resistance of the cell during programming. The resistance of the cell is measured to determine its logical value.
The RRAM approach can support multi-bit storage per cell like 2-bit multi-level cell (MLC) and 3-bit triple-level cell (TLC) flash memory. Unlike block-oriented NAND flash, RRAM is byte addressable, so it can be used as main memory rather than block storage.
RRAM has at least a 10-year retention and an endurance of more than 10,000 cycles. It is 20 times faster than NAND flash using the same geometries. It also has 20 times less power consumption and uses half the die size for the same NAND flash capacity. A 1-Tbyte RRAM chip should only be 200 mm2. The technology is amenable to 3D stacking, which is simpler than Samsung’s new V-NAND (see “The Changing Face Of Non-Volatile Storage” at electronicdesign.com).
Crossbar is working with commercial fabs to incorporate RRAM into their repertoire.