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Arm Pumps Up Its Neoverse Compute Subsystems

Aug. 29, 2023
The CSS significantly reduces SoC engineering overhead for faster time-to-market.

What you’ll learn

  • What is a Neoverse Compute Subsystem (CSS)?
  • What is in the CSS N2?
  • How does a CSS save time and money?

Arm’s Neoverse N2 core has been around for a while. It targets large, multicore processing solutions for cloud and enterprise servers, where more cores mean more processing power. Designing these large system-on-chip (SoC) solutions is time-consuming and expensive, though IP such as network-on-chip (NoC) makes these designs easier. However, there’s much more than just CPU cores and NoCs on these chips.

The Neoverse Compute Subsystem (CSS) ties together a lot of what’s needed to build this type of SoC (Fig. 1). In one sense, CSS is about using more Arm IP and giving more money to Arm. Of course, that’s going to happen anyway, to a different degree, to gain access to the Neoverse N2 core.

The flip side is the amount of savings in time and relative licensing cost. We focus on the time savings, because it’s more than just grabbing a bundle of IP and having a chip roll out from a fab. Getting all of that logic to work efficiently and effectively is a challenge—one that Arm addressed to alleviate developers from having to repeat the exercise.

The complexity of these systems becomes apparent when viewing the scale of these potential SoCs. A typical 256-core system could be built using two SoCs that include two CSS N2 chiplets featuring internal and external connections to provide a unified 256-core system with shared memory (Fig. 2).

High-speed chip-to-chip (C2C) connections work between die while PCIe/CXL system-to-system (S2S) links tie the SoCs together. Similar external links would provide larger, multichip configurations. The C2C links can either use Arm’s UCIe support or third-party PHYs. Configuring and verifying these large, multicore configurations is what comes with CSS N2.

The CXL links can also provide access to other CXL-based systems, such as machine-learning accelerators, GPUs, and FPGAs, as well as conventional PCIe devices. The CXL links do provide CXL Type 3 memory expansion support, which is becoming more popular in large data centers. CXL-capable PCIe switches provide additional expansion options with these types of systems.

One advantage of a unified design solution like CSS N2 is that it’s easier to configure and optimize the software since it targets a known architecture (Fig. 3). This is where the Neoverse Reference Design Platform Software comes into play. The software is designed to be extensible and provides access to hardware features like security and power management.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.  

I still get a hand on software and electronic hardware. Some of this can be found on our Kit Close-Up video series. You can also see me on many of our TechXchange Talk videos. I am interested in a range of projects from robotics to artificial intelligence. 

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