Voice Codec For RISC/DSP Core Handles All VoIP Operations On One Chip

Voice over Internet Protocol (VoIP) has arrived as equipment vendors break through the barriers of corporate telecom and IT infrastructure and politics. ARC International is hopping onto the VoIP rocketship with its voice coding library.

This program library includes a full set of codec types, including A-law, µ-law, adaptive differential pulse-code modulation, and code-excited linear prediction compression schemes. Also incorporated are algorithms for line and acoustic echo cancellation (LEC, AEC) for suppressing analog line and background noise effects.

Routines for packet loss concealment, which protects against corrupt or lost data during the transmission of voice packets, are included. Also in the library are programs for dual tone multifrequency tones, caller ID, voice activity generation, and comfort noise generation. All routines fully comply with relevant ITU standards.

The voice codec library runs on the ARCtangent-A5 RISC/DSP core, one of ARC's user-customizable processors. This 32-bit processor, with both 16- and 32-bit instruction sets, has hardware DSP instruction extensions to facilitate the running of the voice codec software.

In most VoIP implementations, a separate DSP chip runs the voice-processing functions while a separate RISC processor handles the networking protocols. With the ARCtangent-A5, all operations run on a single chip, seriously cutting size, cost, and power consumption. Because all elements of the VoIP design are in one chip, there's no need to integrate different chips and multiple program development systems.

The ARC solution makes possible a low-cost IP phone that can easily run from the dc power supplied over an Ethernet connection. The voice coding library is available now.

See associated figure